diff options
author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2022-03-07 12:58:13 +0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-09 14:23:00 +0000 |
commit | 3e5518d72b59b6d34f58c546fe5fa072cb2025b9 (patch) | |
tree | f7506fab3e9c570750fa67277ecf81bc432e127a /src/mainboard/google/brya/variants/anahera | |
parent | a1b9f9f611a2fcf553bc6363b2c259c45a0ba707 (diff) |
mb/google/brya/var/anahera{4es}: Configure Acoustic noise mitigation
Enable Acoustic noise mitigation and set slew rate to 1/8
BUG=b:223082189
TEST=build and verified by power team
Change-Id: I256cc57fb54e5d62e22470a01e7efef359d57083
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/anahera')
-rw-r--r-- | src/mainboard/google/brya/variants/anahera/overridetree.cb | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 6a79a961a6..0db917ef40 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -23,6 +23,13 @@ fw_config end chip soc/intel/alderlake register "SaGv" = "SaGv_Enabled" + # Acoustic settings + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" + register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" + register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |