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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-10-07 16:02:11 -0600 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-10-08 18:11:08 +0000 |
commit | 36721a483b9dffbae7cab37b18ae18a70c986af2 (patch) | |
tree | 312442a6e5b562164e02e19d47bbc9d1d1e0b3a2 /src/mainboard/google/brya/variants/anahera | |
parent | 3394f4a8f688dcc4daaa47f9c65c6d7c5fa8fcd2 (diff) |
mb/google/brya: Add GPIO_IN_RW to all variants' early GPIO tables
Before attempting another commit 6260bf71 ("vboot_logic: Set
VB2_CONTEXT_EC_TRUSTED in verstage_main"), ensure that brya's variants
all program EC_IN_RW as an input GPIO in bootblock so that it can be read
from in verstage.
Change-Id: I6b1af50f257dc7b627c4c00d7480ba7732c3d1a0
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58183
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Hsuan-ting Chen <roccochen@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/anahera')
-rw-r--r-- | src/mainboard/google/brya/variants/anahera/gpio.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/gpio.c b/src/mainboard/google/brya/variants/anahera/gpio.c index 1ce98e4d10..9344d4c0ad 100644 --- a/src/mainboard/google/brya/variants/anahera/gpio.c +++ b/src/mainboard/google/brya/variants/anahera/gpio.c @@ -118,6 +118,8 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), /* E16 : RSVD_TP ==> WWAN_RST_L */ PAD_CFG_GPO(GPP_E16, 0, DEEP), + /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ + PAD_CFG_GPI(GPP_F18, NONE, DEEP), /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */ |