diff options
| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2022-03-07 13:13:29 +0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-09 14:23:25 +0000 |
| commit | 21fb05606fd19e18988764bc52e3e330bebcb328 (patch) | |
| tree | 61c3694b8fd43cd06388c289e8f61d3c2ef229e9 /src/mainboard/google/brya/variants/anahera4es | |
| parent | 3e5518d72b59b6d34f58c546fe5fa072cb2025b9 (diff) | |
mb/google/bry/anahera{4es}: Disable TCSS port1
Disable unused TCSS Port1.
BUG=b:223082190
TEST=Build
Change-Id: I63f4b7d89a1e37a00c58201ecc88bb336d0932c9
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/anahera4es')
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera4es/overridetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 61365650dc..0d36ddf6c8 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -65,6 +65,7 @@ chip soc/intel/alderlake register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port + register "tcss_ports[1]" = "TCSS_PORT_EMPTY" device domain 0 on device ref igpu on chip drivers/gfx/generic @@ -131,6 +132,7 @@ chip soc/intel/alderlake device generic 0 on end end end + device ref tbt_pcie_rp1 off end device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" |