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authorMorris Hsu <morris-hsu@quanta.corp-partner.google.com>2024-08-16 09:05:41 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-08-19 13:26:30 +0000
commit5d661b81ae2d3e0e85db73dd7e5d3a68f89ed553 (patch)
tree2c44df9d0fa7e1ca48d77349bc6f15f2c86a5467 /src/mainboard/google/brox
parentd9a625e052491dfa164bcad97d97487671c5dd1d (diff)
mb/google/brox/jubilant: Update fw_config
Change STORAGE_UNPROVISIONED to STORAGE_UNKNOWN depend on depthcharge setting. BUG=None TEST=emerge-brox coreboot Set STORAGE_UNKNOWN on jubilant, check that NVMe and UFS can boot. Change-Id: I4cfd7322c2940862dfbae46e85522715cd7534c1 Signed-off-by: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83935 Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: YH Lin <yueherngl@google.com> Reviewed-by: Bob Moragues <moragues@google.com>
Diffstat (limited to 'src/mainboard/google/brox')
-rw-r--r--src/mainboard/google/brox/variants/jubilant/fw_config.c2
-rw-r--r--src/mainboard/google/brox/variants/jubilant/overridetree.cb8
-rw-r--r--src/mainboard/google/brox/variants/jubilant/variant.c2
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/brox/variants/jubilant/fw_config.c b/src/mainboard/google/brox/variants/jubilant/fw_config.c
index 230605f089..ec95c5773b 100644
--- a/src/mainboard/google/brox/variants/jubilant/fw_config.c
+++ b/src/mainboard/google/brox/variants/jubilant/fw_config.c
@@ -74,7 +74,7 @@ static void fw_config_handle(void *unused)
gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads));
}
- if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNPROVISIONED))) {
+ if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME))) {
printk(BIOS_INFO, "Disable NVMe GPIO pins by fw_config.\n");
gpio_configure_pads(nvme_disable_pads, ARRAY_SIZE(nvme_disable_pads));
diff --git a/src/mainboard/google/brox/variants/jubilant/overridetree.cb b/src/mainboard/google/brox/variants/jubilant/overridetree.cb
index 99b6192234..0613ff93f5 100644
--- a/src/mainboard/google/brox/variants/jubilant/overridetree.cb
+++ b/src/mainboard/google/brox/variants/jubilant/overridetree.cb
@@ -1,8 +1,8 @@
fw_config
field STORAGE 2 3
+ option STORAGE_UNKNOWN 0
option STORAGE_UFS 1
option STORAGE_NVME 2
- option STORAGE_UNPROVISIONED 3
end
field WIFI_BT 4 4
option WIFI_BT_CNVI 0
@@ -294,7 +294,7 @@ chip soc/intel/alderlake
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
probe STORAGE STORAGE_NVME
- probe STORAGE STORAGE_UNPROVISIONED
+ probe STORAGE STORAGE_UNKNOWN
end
device ref pcie_rp5 on
register "pch_pcie_rp[PCH_RP(5)]" = "{
@@ -332,11 +332,11 @@ chip soc/intel/alderlake
device generic 0 alias ish_conf on end
end
probe STORAGE STORAGE_UFS
- probe STORAGE STORAGE_UNPROVISIONED
+ probe STORAGE STORAGE_UNKNOWN
end
device ref ufs on
probe STORAGE STORAGE_UFS
- probe STORAGE STORAGE_UNPROVISIONED
+ probe STORAGE STORAGE_UNKNOWN
end
device ref i2c0 on
chip drivers/i2c/generic
diff --git a/src/mainboard/google/brox/variants/jubilant/variant.c b/src/mainboard/google/brox/variants/jubilant/variant.c
index dda054e370..c6b2626009 100644
--- a/src/mainboard/google/brox/variants/jubilant/variant.c
+++ b/src/mainboard/google/brox/variants/jubilant/variant.c
@@ -31,7 +31,7 @@ void variant_devtree_update(void)
struct device *ish = DEV_PTR(ish);
struct device *nvme_rp = DEV_PTR(pcie4_0);
- if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNPROVISIONED))) {
+ if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
printk(BIOS_INFO, "fw_config storage is unknown so enable all storage devices.\n");
return;
}