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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-11-14 13:57:16 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-18 11:34:36 +0000
commit3a7102d628a5af3531d640d7121dd0eebd47b7cd (patch)
treee601f70304251d62b292355ca44dd3e41d58e3bc /src/mainboard/google/brox
parent00b0285b36644d6c4c64b0c28782db1962fc4568 (diff)
vendorcode/intel/fsp/skx_sp: Fix PCI domain scanning
Properly scan all logical stack when creating PCI domains. Fixes PCI bus ranges being used on other stacks, since they look unused, as not all stacks are checked. Change-Id: I13c8b389a585dbccec182d3c98021f1d9d648b2c Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85138 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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