diff options
author | Nick Vaccaro <nvaccaro@google.com> | 2024-08-16 20:17:39 -0700 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-21 14:29:33 +0000 |
commit | bd5356cfefe4315a7e888de9d4ffe2128bd74310 (patch) | |
tree | 111a1492d07417601fa44e8b94f966aaa43de939 /src/mainboard/google/brox/variants/jubilant/gpio.c | |
parent | 2a83686947316f9df3cb9c61c1c6eed480623891 (diff) |
mb/goog/brox: unlock gpio wake sources
The power off code in depthcharge disables all GPEs prior to power off.
The problem is that for gpio wake sources that are locked, this power
off code cannot successfully clear any pending interrupt from that
source. This can result in the device incorrectly waking back up after
it's been powered off from the firmware dev screen.
BUG=b:360380950, b:359692570
BRANCH=None
TEST=verify brox DUT is able to power down and stay powered down when
selecting the "Power off" button in the firmware dev screen.
Change-Id: I5cd36640677996209beb8fe29f522ff8e07ebf00
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/mainboard/google/brox/variants/jubilant/gpio.c')
-rw-r--r-- | src/mainboard/google/brox/variants/jubilant/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brox/variants/jubilant/gpio.c b/src/mainboard/google/brox/variants/jubilant/gpio.c index 0540cd1ceb..a8e652c3c6 100644 --- a/src/mainboard/google/brox/variants/jubilant/gpio.c +++ b/src/mainboard/google/brox/variants/jubilant/gpio.c @@ -41,7 +41,7 @@ static const struct pad_config override_gpio_table[] = { /* GPP_D15 : ISH_UART0_RTS_L/I2C7B_SDA ==> FPMCU_RST_J_SUB_L (active low) */ PAD_CFG_GPO_LOCK(GPP_D15, 0, LOCK_CONFIG), /* GPP_F15 : [NF1: GSXSRESET# NF3: THC1_SPI2_IO3 NF6: USB_C_GPP_F15] ==> FP GSPI INT */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F15, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_F15, NONE, PWROK, LEVEL, INVERT), /* GPP_F11 : [NF3: THC1_SPI2_CLK NF4: GSPI1_CLK NF6: USB_C_GPP_F11] ==> FP GSPI CLK */ PAD_CFG_NF_LOCK(GPP_F11, NONE, NF4, LOCK_CONFIG), /* GPP_F12 : [NF1: GSXDOUT NF3: THC1_SPI2_IO0 NF4: GSPI1_MOSI NF5: I2C1A_SCL |