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authorKarthikeyan Ramasubramanian <kramasub@google.com>2024-02-01 13:48:08 -0700
committerFelix Held <felix-coreboot@felixheld.de>2024-02-05 14:06:47 +0000
commitb1c50be5665c876ba0302dfcd3e1a420a008bbba (patch)
treecd305bf90298b8fb037d7a20147d2c54a3a66652 /src/mainboard/google/brox/variants/baseboard
parent3e397ddacbaa61d766fde21ddbea30493c6df9b8 (diff)
mb/google/brox: Fix the I2C configuration
Update the I2C configuration to match the usage such that only required I2C controllers are enabled. BUG=b:319390850 TEST=Build Brox BIOS image and boot to OS. Ensure that only the required I2C controllers are enabled. Change-Id: I9f24beb9ef587163362cc6ded88efb05be1329b9 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80303 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brox/variants/baseboard')
-rw-r--r--src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
index e1c8134d6a..3e0e7fb91e 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
+++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
@@ -48,9 +48,9 @@ chip soc/intel/alderlake
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoPci,
- [PchSerialIoIndexI2C3] = PchSerialIoPci,
- [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
- [PchSerialIoIndexI2C5] = PchSerialIoPci,
+ [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C4] = PchSerialIoPci,
+ [PchSerialIoIndexI2C5] = PchSerialIoDisabled,
}"
register "serial_io_gspi_mode" = "{