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authorSubrata Banik <subratabanik@google.com>2024-07-09 23:00:50 +0530
committerSubrata Banik <subratabanik@google.com>2024-07-11 15:23:17 +0000
commitea6b6acd01708ad88f4c6fefc4fd074790245f48 (patch)
tree1659abf14d850a430dfddbe12c3ee80dc0ea1f95 /src/mainboard/google/brox/acpi
parent91d2f5d5e00564525d91135bb7684e52528b26b0 (diff)
soc/intel/cmn/cse: Refactor CBMEM ID handling for flexibility
This patch refactors the handling of CSE CBMEM IDs to enable platforms to choose whether to perform CSE sync operations within coreboot or defer it to the payload. This separation improves code organization, ensuring `cse_lite.c` focuses on coreboot-specific CSE Lite tasks. Now, platforms can select: * `SOC_INTEL_CSE_LITE_SKU` for CSE sync within coreboot * `SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD` for deferred payload sync This change ensures mutually exclusive options, avoiding unnecessary SPI flash size increases. BUG=b:305898363 TEST=Builds and boots successfully: * google/rex0 with SOC_INTEL_CSE_LITE_SKU * google/rex64 with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD Change-Id: I74f70959715f9fd6d4d298faf310592874cc35d4 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83393 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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