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authorJoel Linn <jl@conductive.de>2024-03-29 14:08:35 +0100
committerNico Huber <nico.h@gmx.de>2024-04-13 13:22:58 +0000
commitfb51661be11f4372f016b2c117114ceec574a2be (patch)
treed47f3c16b4e5af4581bc7f4c1ac5eec8cbeec598 /src/mainboard/google/beltino
parent1a7ffa8521e0cee15a689176b29048e1c2bfcbcf (diff)
superio/ite: Unify it8772f with common code
The it8772f is now configured by the much better common code that is used for other chips in the family as well. This mainly concerns the EC, the GPIO functionality was not moved to common as it currently lacks a sane abstraction in any codebase. The datasheets of the it8772e(f) and it8728f (for reference) were studied and verified against the common code, adding exceptions where needed. Change-Id: Ic4d9d5460628e444dc20f620179b39c90dbc28c6 Signed-off-by: Joel Linn <jl@conductive.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81310 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/google/beltino')
-rw-r--r--src/mainboard/google/beltino/bootblock.c2
-rw-r--r--src/mainboard/google/beltino/devicetree.cb4
-rw-r--r--src/mainboard/google/beltino/onboard.h2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/beltino/bootblock.c b/src/mainboard/google/beltino/bootblock.c
index a68b03fdf2..4139e383a7 100644
--- a/src/mainboard/google/beltino/bootblock.c
+++ b/src/mainboard/google/beltino/bootblock.c
@@ -9,7 +9,7 @@ void mainboard_config_superio(void)
{
/* Early SuperIO setup */
ite_kill_watchdog(IT8772F_GPIO_DEV);
- it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV);
+ ite_ac_resume_southbridge(IT8772F_EC_DEV);
ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE);
/* Turn on Power LED */
diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb
index cdaab35b54..d96ee118bc 100644
--- a/src/mainboard/google/beltino/devicetree.cb
+++ b/src/mainboard/google/beltino/devicetree.cb
@@ -81,9 +81,9 @@ chip northbridge/intel/haswell
# Skip keyboard init
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
- register "peci_tmpin" = "3"
+ register "TMPIN3.mode" = "THERMAL_PECI"
# Enable FAN2
- register "fan2_enable" = "true"
+ register "FAN2.mode" = "FAN_SMART_SOFTWARE"
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1
diff --git a/src/mainboard/google/beltino/onboard.h b/src/mainboard/google/beltino/onboard.h
index 8bd21ce3d5..36295ece68 100644
--- a/src/mainboard/google/beltino/onboard.h
+++ b/src/mainboard/google/beltino/onboard.h
@@ -26,7 +26,7 @@
#define IT8772F_BASE 0x2e
#define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1)
#define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO)
-#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0)
+#define IT8772F_EC_DEV PNP_DEV(IT8772F_BASE, IT8772F_EC)
#ifndef __ACPI__
void lan_init(void);