diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-04-17 18:29:58 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-31 19:10:30 +0200 |
| commit | 1186915c1f983f535102c52d467b68a52d92ca7d (patch) | |
| tree | 8dd0c08f24f6ecbbd81e42dbbec9d7f87d4c4eea /src/mainboard/google/beltino | |
| parent | a672d155a217b70a5bb6505a36ba65c3a8f90137 (diff) | |
google/beltino: add board-specific USB port info
Add capability and location data for USB ports/devices via
_PLD and _UPC ACPI methods, which is utilized by Windows and
required by macOS.
All beltino variants use the exact same USB port layout.
Change-Id: If5b540949ea071f7165876e12ac1ef50e62d2b22
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/19966
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/beltino')
| -rw-r--r-- | src/mainboard/google/beltino/acpi/mainboard.asl | 3 | ||||
| -rw-r--r-- | src/mainboard/google/beltino/acpi/usb.asl | 144 |
2 files changed, 147 insertions, 0 deletions
diff --git a/src/mainboard/google/beltino/acpi/mainboard.asl b/src/mainboard/google/beltino/acpi/mainboard.asl index 03dc5e0214..e6f931e5ad 100644 --- a/src/mainboard/google/beltino/acpi/mainboard.asl +++ b/src/mainboard/google/beltino/acpi/mainboard.asl @@ -67,3 +67,6 @@ Scope (\_SB.PCI0.RP02) } } } + +/* USB port entries */ +#include "acpi/usb.asl" diff --git a/src/mainboard/google/beltino/acpi/usb.asl b/src/mainboard/google/beltino/acpi/usb.asl new file mode 100644 index 0000000000..59c96544c0 --- /dev/null +++ b/src/mainboard/google/beltino/acpi/usb.asl @@ -0,0 +1,144 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (\_SB.PCI0.XHCI.HUB7.PRT2) +{ + // USB 2.0 Port 1 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + Zero, // USB Port + Zero, // Reserved + Zero // Reserved + }) + + // Visible + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + Return (GPLD (One)) + } +} +Scope (\_SB.PCI0.XHCI.HUB7.PRT3) +{ + // USB 2.0 Port 2 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + Zero, // USB Port + Zero, // Reserved + Zero // Reserved + }) + + // Visible + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + Return (GPLD (One)) + } +} +Scope (\_SB.PCI0.XHCI.HUB7.PRT4) +{ + // Bluetooth + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + 0xFF, // OEM Connector + Zero, // Reserved + Zero // Reserved + }) + + // Not Visible + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + Return (GPLD (Zero)) + } +} +Scope (\_SB.PCI0.XHCI.HUB7.PRT5) +{ + // USB 2.0 Port 3 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + Zero, // USB Port + Zero, // Reserved + Zero // Reserved + }) + + // Visible + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + Return (GPLD (One)) + } +} +Scope (\_SB.PCI0.XHCI.HUB7.PRT6) +{ + // USB 2.0 Port 4 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + Zero, // USB Port + Zero, // Reserved + Zero // Reserved + }) + + // Visible + Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device + { + Return (GPLD (One)) + } +} +Scope (\_SB.PCI0.XHCI.HUB7.SSP1) +{ + // USB 3.0 Port 1 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + 0x03, // USB 3.0 Port + Zero, // Reserved + Zero // Reserved + }) +} +Scope (\_SB.PCI0.XHCI.HUB7.SSP2) +{ + // USB 3.0 Port 2 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + 0x03, // USB 3.0 Port + Zero, // Reserved + Zero // Reserved + }) +} +Scope (\_SB.PCI0.XHCI.HUB7.SSP3) +{ + // USB 3.0 Port 3 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + 0x03, // USB 3.0 Port + Zero, // Reserved + Zero // Reserved + }) +} +Scope (\_SB.PCI0.XHCI.HUB7.SSP4) +{ + // USB 3.0 Port 4 + Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities + { + 0xFF, // Connectable + 0x03, // USB 3.0 Port + Zero, // Reserved + Zero // Reserved + }) +} |