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authorFelix Held <felix-coreboot@felixheld.de>2023-12-15 10:57:30 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-16 20:14:34 +0000
commitd123f8d8716811149ecdf7d51661d8cee6f48577 (patch)
tree36c6ae14a65508adac7889c4d43fa098db0bafca /src/mainboard/google/beltino/Makefile.inc
parent1c295092d61c2ac7427ddac6d194d99337f86094 (diff)
soc/amd/genoa: rename to genoa_poc
Even though this SoC is called 'Genoa', the openSIL implementation and the corresponding coreboot integration is only a proof of concept that isn't fully featured, has known limitations and bugs, and is not meant for or ready to being productized. Adding the proof of concept suffix to the name should point this out clearly enough so that no potential customer could infer that this might be a fully functional and supported implementation which it is not. Change-Id: Ia459b1e007dcfd8e8710c12e252b2f9a4ae19b72 Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77894 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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