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authorArthur Heymans <arthur@aheymans.xyz>2019-05-12 14:11:00 +0200
committerPatrick Rudolph <siro@das-labor.org>2019-05-14 06:59:48 +0000
commit57459dbeacb4759c3352206464b6c19b7add00d5 (patch)
tree18a030d42552d34533202442c93a3ee5c71ae3cd /src/mainboard/google/auron/variants
parent55cb5f8de53366c9df10ed9307cc9088c96191cf (diff)
mb/{lenovo/x201,packardbell/ms2290}: Remove superfluous TS init
Timestamps are initialized in cpu/intel/car/romstage.c. Change-Id: Ia2b762667be17aa5b482cd585dd6f6198cf50d9e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32758 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron/variants')
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