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authorAngel Pons <th3fanbus@gmail.com>2020-09-02 18:54:03 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-08 05:26:25 +0000
commitf8d47455f7826913dc8d19663d04c8a5c4c36ba2 (patch)
treeaceb2d02eec8d46de41a00b8fe7eccbc72d1050b /src/mainboard/google/auron/variants/gandof
parent657edbeea4e754114bf1181f60731020c143ac76 (diff)
soc/intel/broadwell: Drop `gpu_panel_port_select`
The corresponding bits in PP_ON_DELAYS are reserved MBZ. Change-Id: I9789a7d50c4bce2ccad0bf476f877db25e3ff82e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/google/auron/variants/gandof')
-rw-r--r--src/mainboard/google/auron/variants/gandof/overridetree.cb3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/google/auron/variants/gandof/overridetree.cb b/src/mainboard/google/auron/variants/gandof/overridetree.cb
index e35d3a5529..75c202d663 100644
--- a/src/mainboard/google/auron/variants/gandof/overridetree.cb
+++ b/src/mainboard/google/auron/variants/gandof/overridetree.cb
@@ -1,7 +1,6 @@
chip soc/intel/broadwell
- # Enable Panel and configure power delays
- register "gpu_panel_port_select" = "1" # eDP
+ # Set panel power delays
register "gpu_panel_power_cycle_delay" = "5" # 400ms
register "gpu_panel_power_up_delay" = "400" # 40ms
register "gpu_panel_power_down_delay" = "150" # 15ms