diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 13:55:56 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-27 16:03:32 +0000 |
| commit | 19f1e9104a5ae08d031b108a9640bf0f61f61b79 (patch) | |
| tree | acd363b8be339593845f2c2b76a06a86daeea85a /src/mainboard/google/auron/variants/gandof | |
| parent | 3533808a6dbe335fa76bc82869fb6e9719b250ab (diff) | |
mb/google/auron: Refactor memory-down SPD handling
Variants only need to provide the SPD index and whether said index
corresponds to a dual-channel configuration, which can be achieved
without using `pei_data`. Add two functions that return the values
and use them in `spd.c` at mainboard level.
Change-Id: I9bc4527057d4a771883c8cc60da2501516d6fb94
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55803
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/google/auron/variants/gandof')
| -rw-r--r-- | src/mainboard/google/auron/variants/gandof/spd/spd.c | 24 |
1 files changed, 7 insertions, 17 deletions
diff --git a/src/mainboard/google/auron/variants/gandof/spd/spd.c b/src/mainboard/google/auron/variants/gandof/spd/spd.c index 90958c8dd4..d144e20ec3 100644 --- a/src/mainboard/google/auron/variants/gandof/spd/spd.c +++ b/src/mainboard/google/auron/variants/gandof/spd/spd.c @@ -1,21 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <endian.h> -#include <string.h> -#include <southbridge/intel/lynxpoint/lp_gpio.h> -#include <soc/pei_data.h> -#include <soc/romstage.h> -#include <ec/google/chromeec/ec.h> -#include <mainboard/google/auron/ec.h> #include <mainboard/google/auron/variant.h> +#include <southbridge/intel/lynxpoint/lp_gpio.h> /* Gandof board memory configuration GPIOs */ #define SPD_GPIO_BIT0 13 #define SPD_GPIO_BIT1 9 #define SPD_GPIO_BIT2 47 -/* Copy SPD data for on-board memory */ -void mainboard_fill_spd_data(struct pei_data *pei_data) +unsigned int variant_get_spd_index(void) { const int gpio_vector[] = { SPD_GPIO_BIT0, @@ -23,15 +16,12 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) SPD_GPIO_BIT2, -1, }; + return get_gpios(gpio_vector); +} - const unsigned int spd_index = get_gpios(gpio_vector); - - fill_spd_for_index(pei_data->spd_data[0][0], spd_index); - +bool variant_is_dual_channel(const unsigned int spd_index) +{ /* Index 0-2 are 4GB config with both CH0 and CH1. * Index 4-6 are 2GB config with CH0 only. */ - if (spd_index > 3) - pei_data->dimm_channel1_disabled = 3; - else - memcpy(pei_data->spd_data[1][0], pei_data->spd_data[0][0], SPD_LEN); + return !(spd_index > 3); } |