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authorAngel Pons <th3fanbus@gmail.com>2020-10-25 02:14:51 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-30 00:44:44 +0000
commita6f02a8c494a6a8584caf0453a028d76bdd2d972 (patch)
tree0521c51dc3dd3154100fb425b4ed4bc3aafc0831 /src/mainboard/google/auron/variants/buddy
parentd79b87a1d6fcd6228edbd894e7e7ebc9b85d2813 (diff)
soc/intel/broadwell/cpu.c: Re-add `configure_thermal_target`
Commit 360684b (soc/intel/common: add TCC activation functionality) made Broadwell use common SoC code. However, this makes Broadwell depend on SoC code, which prevents splitting Broadwell into CPU, northbridge and southbridge, a stepping stone before merging with Haswell and Lynxpoint. Tested on out-of-tree Acer E5-573, still boots. Change-Id: Ib7ab4e75bd4416dde4612e67405a871da569008a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46731 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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