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authorDuncan Laurie <dlaurie@chromium.org>2016-05-10 15:56:16 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-05-31 18:46:39 +0200
commitb25a45ca46478bb5b0989f7e3f3aa5bdd8b36ef2 (patch)
tree127f57edb659d790e91b4cfb3b048e83a1788432 /src/mainboard/gigabyte
parent98d69c0627f47d79554f33893ca332d37d974799 (diff)
skylake: Add SD card device to configure card detect GPIO
Add a PCI driver for the skylake SD card device and have it generate an entry in the SSDT for the card detect GPIO if it is provided by the mainboard in devicetree. This sets up a card detect GPIO configuration that will trigger an interrupt on both edges with a 100ms debounce timeout and can wake the SD controller from D3 state. The GpioInt() entry is bound to the "cd-gpio" device property which will be consumed by the kernel driver. The resulting ACPI output in the SSDT will be combined with the SDXC device declaration in the DSDT. Example: Scope (\_SB.PCI0.SDXC) { Name (_CRS, ResourceTemplate () { GpioInt (Edge, ActiveBoth, SharedAndWake, PullNone, 10000, "\\_SB.PCI0.GPIO", 0, ResourceConsumer) { 35 } }) Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "cd-gpio", Package () { \_SB.PCI0.SDXC, 0, 0, 1 } } } }) } Change-Id: Ie4c1bfadd962cf55a987edb9ef86e92174205770 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14995 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/gigabyte')
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