diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-03-21 22:34:44 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-30 08:55:19 +0000 |
commit | 991ee05de9fedc15f178660e0cac0b46e783525e (patch) | |
tree | c8bfd967763942cb684687dda8a4e0239142297c /src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb | |
parent | 0c0b16ac9e8ae62533f3029aa1a9f33506222dce (diff) |
mb/gigabyte/ga-h61m-s2pv: rename to ga-h61m-series
It is not a single mainboard anymore, it's actually three variants.
Change-Id: I66f1239abadd8bf93269d6d4617329dc4b925e8d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39743
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb')
-rw-r--r-- | src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb new file mode 100644 index 0000000000..35f5144dec --- /dev/null +++ b/src/mainboard/gigabyte/ga-h61m-series/variants/ga-h61m-s2pv/overridetree.cb @@ -0,0 +1,58 @@ +## SPDX-License-Identifier: GPL-2.0-only +## This file is part of the coreboot project. + +chip northbridge/intel/sandybridge + device domain 0 on + + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + + device pci 1c.0 on end # RP #1: PCIe x1 Port (PCIEX1) + device pci 1c.1 off end # RP #2: + device pci 1c.2 off end # RP #3: + device pci 1c.3 off end # RP #4: + device pci 1c.4 on end # RP #5: Realtek RTL8111F GbE NIC + device pci 1c.5 on end # RP #6: ITE IT8892F PCIe to PCI bridge + + device pci 1f.0 on # LPC bridge + chip superio/ite/it8728f + device pnp 2e.0 off end # Floppy + device pnp 2e.1 on # COM1 + io 0x60 = 0x03f8 + irq 0x70 = 4 + end + device pnp 2e.2 off end # COM2 + device pnp 2e.3 on # Parallel port + io 0x60 = 0x0378 + irq 0x70 = 7 + drq 0x74 = 4 + end + device pnp 2e.4 on # Environment Controller + io 0x60 = 0x0a30 + irq 0x70 = 9 + io 0x62 = 0x0a20 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + irq 0x70 = 1 + io 0x62 = 0x64 + end + device pnp 2e.6 on # Mouse + irq 0x70 = 12 + end + device pnp 2e.7 on # GPIO + irq 0x25 = 0x40 + irq 0x27 = 0x10 + irq 0x2c = 0x80 + io 0x60 = 0x0000 + io 0x62 = 0x0a00 + io 0x64 = 0x0000 + irq 0x70 = 0x00 + irq 0xcb = 0x00 + irq 0xf1 = 0x40 + end + device pnp 2e.a off end # CIR + end + end + end + end +end |