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author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 18:57:34 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 21:36:00 +0000 |
commit | ce3e6380b98c8e40292efa44bf6752cf34ee9af4 (patch) | |
tree | 63c583960838cd4a0f1108b5f633df3d06b6a372 /src/mainboard/gigabyte/ga-h61m-series/cmos.layout | |
parent | 4a2f08c846bd835808a23d1cb699899aaf31cf94 (diff) |
nb/intel/ironlake/acpi.c: Factor out PCIEXBAR decoding
Other northbridges have a `decode_pcie_bar` function. Since it's not
needed anywhere else, keep it as a static function for now.
Change-Id: Ide42ffcebb73c3e683e0ccaf0ab3aeae805d1123
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44146
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/gigabyte/ga-h61m-series/cmos.layout')
0 files changed, 0 insertions, 0 deletions