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authorJohn Zhao <john.zhao@intel.com>2022-01-10 10:51:24 -0800
committerSubrata Banik <subratabanik@google.com>2022-01-16 13:20:16 +0000
commit98ce39dce48d9f4b88fb0d71af654f4ed948ea9b (patch)
tree782556d7c9e5c1a9698de5acfd44bda5df5cc4e3 /src/mainboard/gigabyte/ga-h61m-series/acpi
parent0f76a18c3a70fbdb1505a7e23b554026596be5c2 (diff)
soc/intel/common: Abstract the sideband access
The existing Sideband access is with the PCH P2SB. There will be future platforms which access the TCSS registers through SBI other than the PCH P2SB. This change abstracts the SBI with common API. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: Ia6201762fe92801ce6b4ed97d0eac23ac71ccd37 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60978 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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