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authorDamien Zammit <damien@zamaudio.com>2016-09-05 02:38:01 +1000
committerNico Huber <nico.h@gmx.de>2016-09-09 19:40:34 +0200
commit55a54f662e2e793306dc7003afbcb82b49db0a8c (patch)
tree4f3e34f7adbeadc19271647ec84e5f7f413a2524 /src/mainboard/gigabyte/ga-g41m-es2l
parent305224f47ae67cd8f95c53504b5ecc502878c973 (diff)
mb/gigabyte/ga-g41m-es2l: Remove PCI disable on PEG bridge
Although the goal was to hide the ME device by disabling the PCI bridge, the original comment that this bridge was ME related was a mistake, this bridge is for PEG not for ME. We still need this PCI bridge "on" to enable pci express graphics add-on cards. Change-Id: Ibf322136097d77a8e7c05dcb14f72da938187a0a Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/16496 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/gigabyte/ga-g41m-es2l')
-rw-r--r--src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
index c433387846..bd80742408 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
@@ -28,7 +28,6 @@ chip northbridge/intel/x4x # Northbridge
device pci 0.0 on # Host Bridge
subsystemid 0x1458 0x5000
end
- device pci 1.0 off end # PCI Bridge to Management Engine
device pci 2.0 on # Integrated graphics controller
subsystemid 0x1458 0xd000
end