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authorLean Sheng Tan <sheng.tan@9elements.com>2023-02-23 10:13:23 +0000
committerLean Sheng Tan <sheng.tan@9elements.com>2023-02-23 10:54:59 +0000
commit5d4cee75e521b50bd40a1f8cb37be4138e04e67c (patch)
treeebcee8a625ed81f6beffe9a0324c713d6a20b9a6 /src/mainboard/gigabyte/ga-d510ud
parent272c9c07bd9c7dcd684614c67487504ce06f7a36 (diff)
Revert "soc/intel/adl: Select CSE defined ME spec version for alderlake"
This reverts commit 272c9c07bd9c7dcd684614c67487504ce06f7a36. Reason for revert: Sorry was going to give +2 but pressed the submit button and accidentally merged this out of train. Change-Id: I8a2c6407832bdcf3d475209356501f8fc3672f6b Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73213 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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