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authorAaron Durbin <adurbin@chromium.org>2016-05-12 12:43:37 -0500
committerAaron Durbin <adurbin@chromium.org>2016-05-13 22:38:26 +0200
commitfc2e7413b33549814022e2734a68832e9d9be918 (patch)
tree704ad1faa7f99fe2173eda2635208990037aa2a1 /src/mainboard/gigabyte/ga-6bxe/irq_tables.c
parent0b4db1399462dc8febb6d5c798b68c257f9055b1 (diff)
soc/intel/apollolake: provide common LPDDR4 memory init
Instead of having the mainboards duplicate logic surrounding LPDDR4 initialization provide helpers to do the heavy lifting. It also handles the quirks of the FSP configuration which allows the mainboard porting to focus on the schematic/design. Change-Id: I686eb3097c33399a3b94af89237f7fe1b2d34c2f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14790 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ga-6bxe/irq_tables.c')
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