diff options
author | Wim Vervoorn <wvervoorn@eltan.com> | 2019-10-11 13:52:42 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-16 14:11:02 +0000 |
commit | 89f596764775f5de53d4e17a95d2ec88c254e24a (patch) | |
tree | 2bba54350d6321dd6be033e086ca389af4bc2357 /src/mainboard/facebook/fbg1701/onboard.h | |
parent | ea98989e2c6c734bf39239cfd77a540dbe11ab0d (diff) |
mb/facebook/fbg1701: correct clang issues
Corrected clang issues in fbg1701 directory.
BUG=N/A
TEST=build
Change-Id: I968bf8418aa457a7ebd28096bd92a64211bf86dd
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35963
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/facebook/fbg1701/onboard.h')
-rw-r--r-- | src/mainboard/facebook/fbg1701/onboard.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/facebook/fbg1701/onboard.h b/src/mainboard/facebook/fbg1701/onboard.h index 330fe0f7d9..2c78d15961 100644 --- a/src/mainboard/facebook/fbg1701/onboard.h +++ b/src/mainboard/facebook/fbg1701/onboard.h @@ -19,10 +19,8 @@ #define ONBOARD_H /* SD CARD gpio */ -#define SDCARD_CD 81 /* Not used */ +#define SDCARD_CD 81 /* Not used */ -#define ITE8528_CMD_PORT 0x6E -#define ITE8528_DATA_PORT 0x6F /* CPLD definitions */ #define CPLD_PCB_VERSION_PORT 0x283 @@ -32,15 +30,17 @@ #define CPLD_RESET_PORT 0x287 #define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20 #define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00 +#define ITE8528_CMD_PORT 0x6E +#define ITE8528_DATA_PORT 0x6F /* Define the items to be measured or verified */ -#define FSP (const char *)"fsp.bin" -#define CMOS_LAYOUT (const char *)"cmos_layout.bin" -#define RAMSTAGE (const char *)"fallback/ramstage" -#define ROMSTAGE (const char *)"fallback/romstage" -#define PAYLOAD (const char *)"fallback/payload" -#define POSTCAR (const char *)"fallback/postcar" -#define OP_ROM_VBT (const char *)"vbt.bin" -#define MICROCODE (const char *)"cpu_microcode_blob.bin" +#define FSP (const char *)"fsp.bin" +#define CMOS_LAYOUT (const char *)"cmos_layout.bin" +#define RAMSTAGE (const char *)"fallback/ramstage" +#define ROMSTAGE (const char *)"fallback/romstage" +#define PAYLOAD (const char *)"fallback/payload" +#define POSTCAR (const char *)"fallback/postcar" +#define OP_ROM_VBT (const char *)"vbt.bin" +#define MICROCODE (const char *)"cpu_microcode_blob.bin" #endif |