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| author | Yidi Lin <yidilin@chromium.org> | 2024-09-19 10:06:34 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2024-11-06 04:00:11 +0000 |
| commit | 1121a7b9cc0566a76084d63e9c9ea8352711e31c (patch) | |
| tree | db2c0206d730b1f209357475177a496c0226cd15 /src/mainboard/facebook/fbg1701/mainboard.c | |
| parent | d38ed1504ad4f48efd965e01aa1c159bfd1f1353 (diff) | |
mb/google/rauru: Complete PCIe reset in romstage
De-assert PERST# at romstage to reduce the waiting time in ramstage.
BUG=b:361728592
TEST=The boot time improves 62ms
Change-Id: I2cd5cd59e7513b6e4036c3e8013a3c7322d2f787
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/mainboard/facebook/fbg1701/mainboard.c')
0 files changed, 0 insertions, 0 deletions