drivers/spi/spi_flash_sfdp: use spi_crop_chunk when reading SFDP data

The basic flash parameter table described in JESB216F can be up to 23
DWORDs (92 bytes) long which is larger than the 47 byte SPI data buffer
in the AMD SoCs which also contains the data from the command buffer
except the command byte.

TEST=Calling 'read_sfdp_data' with a data length of 256 bytes which is
larger than the buffer of the AMD SPI host controller now works and
returns the SFDP data expected from the W74M12JW SPI flash:

0x00: 53 46 44 50 06 01 02 ff 00 06 01 10 80 00 00 ff  SFDP............
0x10: 84 00 01 02 d0 00 00 ff 03 00 01 02 f0 00 00 ff  ................
0x20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
...
0x80: e5 20 f9 ff ff ff ff 07 44 eb 08 6b 08 3b 42 bb  . ......D..k.;B.
0x90: fe ff ff ff ff ff 00 00 ff ff 40 eb 0c 20 0f 52  ..........@.. .R
0xa0: 10 d8 00 00 36 02 a6 00 82 ea 14 c9 e9 63 76 33  ....6........cv3
0xb0: 7a 75 7a 75 f7 bd d5 5c 19 f7 4d ff e9 30 f8 80  zuzu...\..M..0..
0xc0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
0xd0: 00 00 f0 ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
0xe0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
0xf0: 38 9b 96 f0 a5 ad a5 ff ff ff ff ff ff ff ff ff  8...............

Change-Id: Ia602a54566c9e9cffaebc813ee493254d966e9e4
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>

0 files changed, 0 insertions, 0 deletions