diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2020-03-01 10:02:50 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:11:17 +0000 |
| commit | 6588652ef576c1b26b016925a427b4752a71ffcb (patch) | |
| tree | 578cb99fd1ecc68d5ef7599b82414fbbc8d6f18d /src/mainboard/emulation | |
| parent | 935495f3e70e4759e871a33eea004433fc8928a4 (diff) | |
mb/emulation/qemu-armv7: Fix board
Fix multiple issues allowing to boot until "Payload not loaded":
* The FMAP_CACHE was placed in memory mapped flash
- Place the FMAP_CACHE in DRAM.
* The FMAP_CACHE was overlapping the BOOTBLOCK, which has a default size
of 128KiB.
- Increase the bootblock size in memlayout to 128KiB to match the FMAP.
* The heap in bootblock wasn't usable.
- Add a linking check in armv7 common bootblock to relocate itself to
the linked address.
* A FIT payload couldn't be compiled in as the POSTRAM_CBFS_CACHE was
missing.
- Add the POSTRAM_CBFS_CACHE to memlayout.
* The coreboot log is spammed with missing timestamp table error messages
- Add TIMESTAMP table to memlayout.
Tested on QEMU armv7 vexpress.
Change-Id: Ib9357a5c059ca179826c5a7e7616a5c688ec2e95
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/emulation')
| -rw-r--r-- | src/mainboard/emulation/qemu-armv7/memlayout.ld | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/mainboard/emulation/qemu-armv7/memlayout.ld b/src/mainboard/emulation/qemu-armv7/memlayout.ld index 9d76d9ddd0..4ddc6d2adc 100644 --- a/src/mainboard/emulation/qemu-armv7/memlayout.ld +++ b/src/mainboard/emulation/qemu-armv7/memlayout.ld @@ -28,14 +28,16 @@ SECTIONS { /* TODO: does this thing emulate SRAM? */ - BOOTBLOCK(0x00000, 64K) - FMAP_CACHE(0x10000, 2K) + REGION(flash, 0, CONFIG_ROM_SIZE, 4K) DRAM_START(0x60000000) STACK(0x60000000, 64K) - ROMSTAGE(0x60010000, 128K) - RAMSTAGE(0x60030000, 16M) - + BOOTBLOCK(0x60010000, 128K) + FMAP_CACHE(0x60030000, 4K) + TIMESTAMP(0x60031000, 1K) /* TODO: Implement MMU support and move TTB to a better location. */ - TTB(0x61030000, 16K) + TTB(0x60034000, 16K) + ROMSTAGE(0x60038000, 128K) + RAMSTAGE(0x60060000, 16M) + POSTRAM_CBFS_CACHE(0x61060000, 8M) } |