diff options
author | Shelley Chen <shchen@google.com> | 2021-10-20 15:43:45 -0700 |
---|---|---|
committer | Shelley Chen <shchen@google.com> | 2021-11-10 17:24:16 +0000 |
commit | 4e9bb3308e811000eb089be6b03658e4cb9a4717 (patch) | |
tree | dca19104e9f6144736a042203f53de9802b53a7e /src/mainboard/emulation | |
parent | 5c163bb86926d982af1ffd93b072ca85070ca1e1 (diff) |
Rename ECAM-specific MMCONF Kconfigs
Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space. Some platforms have a different way of mapping the PCI config
space to memory. This patch renames the following configs to
make it clear that these configs are ECAM-specific:
- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH
Please refer to CB:57861 "Proposed coreboot Changes" for more
details.
BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
Make sure Jenkins verifies that builds on other boards
Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/emulation')
-rw-r--r-- | src/mainboard/emulation/qemu-i440fx/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/emulation/qemu-q35/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/emulation/qemu-q35/bootblock.c | 4 | ||||
-rw-r--r-- | src/mainboard/emulation/qemu-q35/memmap.c | 4 |
4 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index 8728e4e9f5..dd11092bfa 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -3,7 +3,7 @@ if BOARD_EMULATION_QEMU_X86_I440FX config BOARD_SPECIFIC_OPTIONS def_bool y select CPU_QEMU_X86 - select NO_MMCONF_SUPPORT + select NO_ECAM_MMCONF_SUPPORT select SOUTHBRIDGE_INTEL_I82371EB select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index e078aa9770..155540dd02 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -56,10 +56,10 @@ config MAINBOARD_DIR config MAINBOARD_PART_NUMBER default "QEMU x86 q35/ich9" -config MMCONF_BASE_ADDRESS +config ECAM_MMCONF_BASE_ADDRESS default 0xb0000000 -config MMCONF_BUS_NUMBER +config ECAM_MMCONF_BUS_NUMBER int default 256 diff --git a/src/mainboard/emulation/qemu-q35/bootblock.c b/src/mainboard/emulation/qemu-q35/bootblock.c index ec86c70a3c..98fcb629fe 100644 --- a/src/mainboard/emulation/qemu-q35/bootblock.c +++ b/src/mainboard/emulation/qemu-q35/bootblock.c @@ -11,12 +11,12 @@ static void bootblock_northbridge_init(void) { /* * The "io" variant of the config access is explicitly used to - * setup the PCIEXBAR because CONFIG(MMCONF_SUPPORT) is set to + * setup the PCIEXBAR because CONFIG(ECAM_MMCONF_SUPPORT) is set to * to true. That way all subsequent non-explicit config accesses use * MCFG. This code also assumes that bootblock_northbridge_init() is * the first thing called in the non-asm boot block code. The final * assumption is that no assembly code is using the - * CONFIG(MMCONF_SUPPORT) option to do PCI config accesses. + * CONFIG(ECAM_MMCONF_SUPPORT) option to do PCI config accesses. * * The PCIEXBAR is assumed to live in the memory mapped IO space under * 4GiB. diff --git a/src/mainboard/emulation/qemu-q35/memmap.c b/src/mainboard/emulation/qemu-q35/memmap.c index 5c4292138d..7d5180e819 100644 --- a/src/mainboard/emulation/qemu-q35/memmap.c +++ b/src/mainboard/emulation/qemu-q35/memmap.c @@ -14,7 +14,7 @@ static uint32_t encode_pciexbar_length(void) { - switch (CONFIG_MMCONF_BUS_NUMBER) { + switch (CONFIG_ECAM_MMCONF_BUS_NUMBER) { case 256: return 0 << 1; case 128: return 1 << 1; case 64: return 2 << 1; @@ -24,7 +24,7 @@ static uint32_t encode_pciexbar_length(void) uint32_t make_pciexbar(void) { - return CONFIG_MMCONF_BASE_ADDRESS | encode_pciexbar_length() | 1; + return CONFIG_ECAM_MMCONF_BASE_ADDRESS | encode_pciexbar_length() | 1; } /* Check that MCFG is active. If it's not, QEMU was started for machine PC */ |