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| author | Eran Mitrani <mitrani@google.com> | 2022-12-12 15:11:35 -0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-12-14 03:46:09 +0000 |
| commit | 988d3eefa65faf704fe59152308ad2797af0f263 (patch) | |
| tree | 6ac28263d5984fda557c5e283612b3cf050b2c15 /src/mainboard/emulation/spike-riscv/uart.c | |
| parent | 0f0a43c9b13c86a578482e57925ee10b6ecce639 (diff) | |
mb/google/hatch/dratini: increase power enable to reset deassert delay
With 1ms delay, reset is de-asserted too soon, before power is fully
up, causing a glitch to the reset signal. The issue is resolved with
4ms delay.
TEST=tested on dratini device and observed the issue is resolved.
BUG=b:260253945
Change-Id: I5c3edbc6ac90d5042c2d3c5b01573d4bb1ea676d
Signed-off-by: Eran Mitrani <mitrani@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70666
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/emulation/spike-riscv/uart.c')
0 files changed, 0 insertions, 0 deletions