summaryrefslogtreecommitdiff
path: root/src/mainboard/emulation/qemu-i440fx
diff options
context:
space:
mode:
authorGerd Hoffmann <kraxel@redhat.com>2013-06-17 12:26:17 +0200
committerRonald G. Minnich <rminnich@gmail.com>2013-06-17 17:00:10 +0200
commit9839a385bb778a87fc00a046a77334709ac78930 (patch)
treea7233e41160753e3696fbe1ddeb783cbf06340cb /src/mainboard/emulation/qemu-i440fx
parent44b11f2fe423a04641ca1059d2ba5a188412cdc7 (diff)
qemu: add support for memory above 4G
Change-Id: Ic83f55d01b29b43028e3b363749d64b927db5489 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/3492 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-i440fx')
-rw-r--r--src/mainboard/emulation/qemu-i440fx/memory.c5
-rw-r--r--src/mainboard/emulation/qemu-i440fx/northbridge.c20
2 files changed, 23 insertions, 2 deletions
diff --git a/src/mainboard/emulation/qemu-i440fx/memory.c b/src/mainboard/emulation/qemu-i440fx/memory.c
index 322fc492ec..8245ca24dd 100644
--- a/src/mainboard/emulation/qemu-i440fx/memory.c
+++ b/src/mainboard/emulation/qemu-i440fx/memory.c
@@ -21,9 +21,14 @@
#define CMOS_ADDR_PORT 0x70
#define CMOS_DATA_PORT 0x71
+
#define HIGH_RAM_ADDR 0x35
#define LOW_RAM_ADDR 0x34
+#define HIGH_HIGHRAM_ADDR 0x5d
+#define MID_HIGHRAM_ADDR 0x5c
+#define LOW_HIGHRAM_ADDR 0x5b
+
static unsigned long qemu_get_memory_size(void)
{
unsigned long tomk;
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index ed372b6a9f..7cf5436c23 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -16,6 +16,18 @@
#include "memory.c"
+static unsigned long qemu_get_high_memory_size(void)
+{
+ unsigned long high;
+ outb (HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
+ high = ((unsigned long) inb(CMOS_DATA_PORT)) << 22;
+ outb (MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
+ high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
+ outb (LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
+ high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
+ return high;
+}
+
static void cpu_pci_domain_set_resources(device_t dev)
{
assign_resources(dev->link_list);
@@ -24,18 +36,22 @@ static void cpu_pci_domain_set_resources(device_t dev)
static void cpu_pci_domain_read_resources(struct device *dev)
{
struct resource *res;
- unsigned long tomk = 0;
+ unsigned long tomk = 0, high;
int idx = 10;
pci_domain_read_resources(dev);
tomk = qemu_get_memory_size();
- printk(BIOS_DEBUG, "Detected %lu MiB RAM.\n", tomk / 1024);
+ high = qemu_get_high_memory_size();
+ printk(BIOS_DEBUG, "Detected %lu MiB RAM below 4G.\n", tomk / 1024);
+ printk(BIOS_DEBUG, "Detected %lu MiB RAM above 4G.\n", high / 1024);
/* Report the memory regions. */
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tomk - 768);
+ if (high)
+ ram_resource(dev, idx++, 4 * 1024 * 1024, high);
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;