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authorArthur Heymans <arthur@aheymans.xyz>2020-11-12 21:05:09 +0100
committerArthur Heymans <arthur@aheymans.xyz>2020-11-20 10:17:56 +0000
commit695dd2977bb04024333d52bf561f67a5678845d9 (patch)
treecf84bce206ed29a8f43191453168302699efceb5 /src/mainboard/clevo
parent281868e55fb45c093a3342d7581f89e4a65548a6 (diff)
soc/intel/xeon_sp: Use common P2SB functions to generate HPET DMAR
This makes coreboot more robust as it does not need to rely on syncing values set by FSP and coreboot. Change-Id: I2d954acdb939e7cb92d44b434ae628d7d935d776 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47533 Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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