mb/clevo/tgl-u: add new board L14xMU

Add new board Clevo L14xMU (TGL).

GPIOs were configured based on schematics.

Tested and working:
 - On-board RAM (M471A1G44AB0-CWE)
 - DIMM slot (tested Crucial CT16G4SFD8266.16FJ1 / MTA16ATF2G64HZ-2G6J1)
 - Graphics (GOP driver), including HDMI
 - Keyboard
 - I2C touchpad (including interrupt)
 - TPM (with interrupt on Windows, only polling on Linux [1])
 - microSD Card reader
 - both NVME ports
 - Speakers
 - Microphone
 - Camera
 - WLAN/BT (CNVi)
 - All USB2/3 ports including Type-C
 - Thunderbolt detects my work laptop in TB Control Center
   (I couldn't test anything more due to security policy.)
 - TianoCore
 - internal flashing with flashrom on vendor firmware

Note on TPM:
The vendor sets Intel PTT to default-on in newer CSME images, which
conflicts with the dTPM. Currently, there are two ways to make it work:

 1) Boot vendor firmware once to let it disable PTT via CSME firmware
    feature override.
 2) Use Intel Flash Image Tool (FIT) to set "initial power-up state" to
    disabled.

Boots fine:
 - Debian testing, unstable (Linux 5.16.14, 5.17.0-rc6)
 - Windows 10 21H2 (Build 19044.1586)

Untested:
- Thunderbolt (see above)
- Type-C DisplayPort
- S-ATA

Doesn't work:
 - TPM interrupt on Linux [1]
 - All EC related functions - EC driver is WIP
  - WLAN/BT (PCIe) - gets detected but can't be enabled
  - 3G/LTE (not powered without EC driver)
  - Fn-Keys
  - S0ix
  - UCSI
  - Fan control
  - Battery info

[1] https://lkml.org/lkml/2021/5/1/103

Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 63 insertions, 0 deletions

diff --git a/src/mainboard/clevo/tgl-u/Kconfig b/src/mainboard/clevo/tgl-u/Kconfig
new file mode 100644
index 0000000000..a97d3d849b
--- /dev/null
+++ b/src/mainboard/clevo/tgl-u/Kconfig
@@ -0,0 +1,63 @@
+config BOARD_CLEVO_TGLU_COMMON
+	def_bool n
+	select BOARD_ROMSIZE_KB_16384
+	select DRIVERS_I2C_HID
+	select DRIVERS_INTEL_PMC
+	select DRIVERS_INTEL_USB4_RETIMER
+	select HAVE_ACPI_TABLES
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
+	select INTEL_GMA_HAVE_VBT
+	select INTEL_LPSS_UART_FOR_CONSOLE
+	select MAINBOARD_HAS_LPC_TPM
+	select MAINBOARD_HAS_TPM2
+	select NO_UART_ON_SUPERIO
+	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+	select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
+	select SOC_INTEL_TIGERLAKE
+	select SPD_READ_BY_WORD
+	select SYSTEM_TYPE_LAPTOP
+
+config BOARD_CLEVO_L140MU
+	select BOARD_CLEVO_TGLU_COMMON
+	select HAVE_SPD_IN_CBFS
+
+if BOARD_CLEVO_TGLU_COMMON
+
+config MAINBOARD_DIR
+	default "clevo/tgl-u"
+
+config VARIANT_DIR
+	default "l140mu" if BOARD_CLEVO_L140MU
+
+config MAINBOARD_PART_NUMBER
+	default "L140MU" if BOARD_CLEVO_L140MU
+
+config MAINBOARD_VERSION
+	default "2.2A" if BOARD_CLEVO_L140MU
+
+config DEVICETREE
+	default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
+
+config CBFS_SIZE
+	default 0xb00000 if BOARD_CLEVO_L140MU
+
+config CONSOLE_POST
+	default y
+
+config UART_FOR_CONSOLE
+	default 2
+
+config TPM_PIRQ
+	default 0x77 if BOARD_CLEVO_L140MU # GPP_C9_IRQ
+
+config POST_DEVICE
+	default n
+
+config SEABIOS_PS2_TIMEOUT
+	default 500
+
+config USE_PM_ACPI_TIMER
+	default n
+
+endif