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| author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2023-10-25 18:11:58 +0800 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2023-10-27 17:21:20 +0000 |
| commit | 926be7736115125ec1706befed6e4cde16e98aef (patch) | |
| tree | 23438346cc73593a6d17f94fdd72fc10ba4019c5 /src/mainboard/clevo/cml-u/Kconfig | |
| parent | face29cd50890e8f6647a2a7ec3e879989b86952 (diff) | |
mb/google/nissa/var/joxer: Override tdp pl1 value for DTT tuning
Follow thermal validation, override tdp pl1 in 6w ADL_N platform to
10w and override tdp pl1 in 15w ADL_N platform to 20w.
BUG=b:307365403
TEST=USE="project_joxer emerge-nissa coreboot"
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I8dd743e65b9e5fbd6aa2fd9c1b87c7bd487c8174
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78650
Reviewed-by: ChiaLing <chia-ling.hou@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Ivan Chen <yulunchen@google.com>
Diffstat (limited to 'src/mainboard/clevo/cml-u/Kconfig')
0 files changed, 0 insertions, 0 deletions