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authorDavid Wu <david_wu@quanta.corp-partner.google.com>2024-05-08 15:29:27 +0800
committerMartin L Roth <gaumless@gmail.com>2024-05-12 18:50:39 +0000
commita56baa1d50f7bbc7533a396b6c2e236109a14a47 (patch)
treecb95c0692aeedde7a6017f04249606ac5607c40e /src/mainboard/cavium
parenteacc1c7ea961016a4675f494ccfaebb53f68b777 (diff)
mb/google/brya/var/riven: Generate SPD ID for supported parts
Add supported memory parts in mem_parts_used.txt, and generate SPD id for these parts. 1. MT62F1G32D4DR-031 WT:B (Mircon) 2. MT62F512M32D2DR-031 WT:B (Mircon) 3. H9JCNNNBK3MLYR-N6E (Hynix) 4. K3LKLKL0EM-MGCN (Samsung) 5. K3LKBKB0BM-MGCP (Samsung) 6. H9JCNNNCP3MLYR-N6E (Hynix) BUG=b:337169542 TEST=build pass Change-Id: I0ff3b1e14fb8bb87d8fc9cbe0e177a5bcedef08c Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82255 Reviewed-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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