mb/bytedance: Add 2 SPR sockets server board bd_egs

Bytedance bd_egs is a dual socket MB with Intel Sapphire Rapids
Scalable Processor chipset.

It's utilising:
- 2 SPR sockets
- Max 32 DIMMs
- 33x CPU PCIe slots
- AST2600 for VGA and BMC remote management

Test:
  The board boots to Linux 5.10 with all 192 cores available.
  All PCIe devices and DIMMS are working.

  # sudo dmesg --level alert,crit,err,warn
  [ 46.636896] netlink: 'consul': attribute type 1 has an invalid length.

Change-Id: I091bc78e39cd76b3c6b9a10a1fcf58e9d671ef5d
Co-authored-by: Jinfeng Li <lijinfeng01@ieisystem.com>
Co-authored-by: Long Cao <caolong01@inspur.com>
Co-authored-by: Hao Wang <wanghao11@inspur.com>
Co-authored-by: Chenyu Lan <lanchenyu@inspur.com>
Co-authored-by: Lay Kong <lay.kong@intel.com>
Co-authored-by: Kehong Chen <kehong.chen@intel.com>
Co-authored-by: Ziang Wang <ziang.wang@intel.com>
Co-authored-by: Dong Wei <weidong.wd@bytedance.com>
Co-authored-by: Chenchen Li <lichenchen.carl@bytedance.com>
Signed-off-by: Yiwei Tang <tangyiwei.2022@bytedance.com>
Reviewed-by: Haitao Nie <niehaitao@bytedance.com>
Reviewed-by: Shijian Ge <geshijian@bytedance.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 12 insertions, 0 deletions

diff --git a/src/mainboard/bytedance/bd_egs/gpio.h b/src/mainboard/bytedance/bd_egs/gpio.h
new file mode 100644
index 0000000000..854a0f5b36
--- /dev/null
+++ b/src/mainboard/bytedance/bd_egs/gpio.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef _BD_EGS_GPIO_
+#define _BD_EGS_GPIO_
+
+#include <gpio.h>
+
+const struct pad_config *get_gpio_table(size_t *num);
+
+const struct pad_config *get_override_fsp_gpio_table(size_t *num);
+
+#endif /* _BD_EGS_GPIO_ */