diff options
| author | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-04 14:26:26 -0600 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-05 21:53:55 +0100 |
| commit | 7ad4dc5e9914e927a827ce48a030d2d04e7ec792 (patch) | |
| tree | 1a279d488f9730ff954a7783dfde95c275c1a09c /src/mainboard/biostar | |
| parent | d502dc092a26726472fc5871c77ebff192be4cb8 (diff) | |
src/amd: Add common definition of AMD ACPI MMIO address
The bare ACPI MMIO address 0xFED80000 was used in multiple
AMD mainboard files as well as the SB800 native code. Reduce
duplication by using a centrally defined value for all AMD
ACPI MMIO access.
Change-Id: I39a30c0d0733096dbd5892c9e18855aa5bb5a4a7
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18032
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/biostar')
| -rw-r--r-- | src/mainboard/biostar/am1ml/romstage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/biostar/am1ml/romstage.c b/src/mainboard/biostar/am1ml/romstage.c index e0afa759d8..167234925b 100644 --- a/src/mainboard/biostar/am1ml/romstage.c +++ b/src/mainboard/biostar/am1ml/romstage.c @@ -30,6 +30,7 @@ #include <northbridge/amd/agesa/agesawrapper.h> #include <cpu/x86/bist.h> #include <cpu/x86/lapic.h> +#include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/agesa/hudson/hudson.h> #include <cpu/amd/agesa/s3_resume.h> #include "cbmem.h" @@ -44,8 +45,7 @@ #define MMIO_NON_POSTED_START 0xfed00000 #define MMIO_NON_POSTED_END 0xfedfffff -#define SB_MMIO 0xFED80000 -#define SB_MMIO_MISC32(x) *(volatile u32 *)(SB_MMIO + 0xE00 + (x)) +#define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) static void it_sio_write(pnp_devfn_t dev, u8 reg, u8 value) |