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author | Hung-Te Lin <hungte@chromium.org> | 2019-08-07 09:59:16 +0800 |
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committer | Julius Werner <jwerner@chromium.org> | 2019-08-14 21:16:09 +0000 |
commit | ff0945e8ec8162d463ee017a86d1423dc51dd633 (patch) | |
tree | 3781f70c445689e4f472b89706baabc268b234ba /src/mainboard/bap/ode_e20XX/cmos.layout | |
parent | 4a73bf8378d8e36f0bae1488aa0b17cb5d5bd4ce (diff) |
soc/mediatek: dsi: Refactor PHY timing calculation
The PHY timing should be calculated by data rate (Mbps). However for
8173 some values were hard-coded so we want to introduce a new
mtk_phy_timing structure and a weak function mtk_dsi_override_phy_timing
that allows per-SOC customization to apply PHY timings.
BUG=b:80501386,b:117254947
TEST=make -j # board = oak and boots
Change-Id: I1176ca06dda026029ff431aca7f9e21479eed670
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/bap/ode_e20XX/cmos.layout')
0 files changed, 0 insertions, 0 deletions