diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-04-27 23:28:31 +1000 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-04-28 20:14:58 +0200 |
| commit | 9e308b9955760ca768b35420d5373e59f398d174 (patch) | |
| tree | 3ff957e4b0e9f96958c181892ac1b10700bbe8c5 /src/mainboard/asus | |
| parent | 959adc3fcff5d2f943f9e064e1162cdb5e5f8ec3 (diff) | |
superio/winbond/w83627ehg: Convert romstage to generic component
Convert the serial init to the generic romstage component and
corresponding boards using this sio.
Change-Id: Ib9f981f43e047013f9cbe20a22246ee2ed3ecf50
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5589
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus')
| -rw-r--r-- | src/mainboard/asus/a8v-e_deluxe/romstage.c | 8 | ||||
| -rw-r--r-- | src/mainboard/asus/a8v-e_se/romstage.c | 10 |
2 files changed, 4 insertions, 14 deletions
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index efc4ac7247..1dea57b090 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -38,6 +38,7 @@ unsigned int get_sbdn(unsigned bus); #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/early_ht.c" +#include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627ehg/w83627ehg.h> #include "southbridge/via/vt8237r/early_smbus.c" #include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */ @@ -153,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct sys_info *sysinfo = &sysinfo_car; sio_init(); - w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); enable_rom_decode(); @@ -166,11 +167,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enumerate_ht_chain(); } - sio_init(); - w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - enable_rom_decode(); - print_info("now booting... real_main\n"); if (bist == 0) diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index 19f5686d10..abe5f84709 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -38,6 +38,7 @@ unsigned int get_sbdn(unsigned bus); #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/early_ht.c" +#include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627ehg/w83627ehg.h> #include "southbridge/via/vt8237r/early_smbus.c" #include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */ @@ -153,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct sys_info *sysinfo = &sysinfo_car; sio_init(); - w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); enable_rom_decode(); @@ -166,13 +167,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enumerate_ht_chain(); } - // FIXME why is this executed again? ---> - sio_init(); - w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - enable_rom_decode(); - // <--- FIXME why is this executed again? - print_info("now booting... real_main\n"); if (bist == 0) |