diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-01 23:25:09 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 13:57:15 +0000 |
| commit | 6baee3d28729d4b924e8f793c4c7311cebf1f80a (patch) | |
| tree | a3cdc029d4a28b9572ee0759a25ffe9480ab7372 /src/mainboard/asus | |
| parent | f9decbb0c720662d8e71fe221aef55b7ecf76196 (diff) | |
mb/*/*: Remove AMD agesa family16 boards
These boards use the LEGACY_SMP_INIT which is to be deprecated after
release 4.18.
Change-Id: I43c7075fb6418a86c57c863edccbcb750f8ed402
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/asus')
20 files changed, 0 insertions, 1348 deletions
diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c deleted file mode 100644 index 1e91906a72..0000000000 --- a/src/mainboard/asus/am1i-a/BiosCallOuts.c +++ /dev/null @@ -1,123 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/azalia.h> -#include <AGESA.h> -#include <console/console.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> -#include <FchPlatform.h> -#include <option.h> -#include <types.h> - -const BIOS_CALLOUT_STRUCT BiosCallouts[] = -{ - {AGESA_DO_RESET, agesa_Reset }, - {AGESA_READ_SPD, agesa_ReadSpd }, - {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, - {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, - {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, - {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, - {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, - {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } -}; -const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); - -/** - * CODEC Initialization Table for Azalia HD Audio using Realtek ALC887-VD chip (from linux, running under vendor bios) - */ -const CODEC_ENTRY Alc887_VerbTbl[] = -{ - { 0x11, 0x40330000 }, - { 0x12, 0x411111f0 }, - { 0x14, 0x01014010 }, - { 0x15, 0x411111f0 }, - { 0x16, 0x411111f0 }, - { 0x17, 0x411111f0 }, - { 0x18, 0x01a19030 }, - { 0x19, 0x02a19040 }, - { 0x1a, 0x0181303f }, - { 0x1b, 0x02214020 }, - { 0x1c, 0x411111f0 }, - { 0x1d, 0x4024c601 }, - { 0x1e, 0x411111f0 }, - { 0x1f, 0x411111f0 } -}; - -static const CODEC_TBL_LIST CodecTableList[] = -{ - {0x10ec0887, (CODEC_ENTRY*)&Alc887_VerbTbl[0]}, - {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} -}; - -#define FAN_INPUT_INTERNAL_DIODE 0 -#define FAN_INPUT_TEMP0 1 -#define FAN_INPUT_TEMP1 2 -#define FAN_INPUT_TEMP2 3 -#define FAN_INPUT_TEMP3 4 -#define FAN_INPUT_TEMP0_FILTER 5 -#define FAN_INPUT_ZERO 6 -#define FAN_INPUT_DISABLED 7 - -#define FAN_AUTOMODE (1 << 0) -#define FAN_LINEARMODE (1 << 1) -#define FAN_STEPMODE ~(1 << 1) -#define FAN_POLARITY_HIGH (1 << 2) -#define FAN_POLARITY_LOW ~(1 << 2) - -/* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */ -#define FREQ_28KHZ 0x0 -#define FREQ_25KHZ 0x1 -#define FREQ_23KHZ 0x2 -#define FREQ_21KHZ 0x3 -#define FREQ_29KHZ 0x4 -#define FREQ_18KHZ 0x5 -#define FREQ_100HZ 0xF7 -#define FREQ_87HZ 0xF8 -#define FREQ_58HZ 0xF9 -#define FREQ_44HZ 0xFA -#define FREQ_35HZ 0xFB -#define FREQ_29HZ 0xFC -#define FREQ_22HZ 0xFD -#define FREQ_14HZ 0xFE -#define FREQ_11HZ 0xFF - -void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) -{ - FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); - FchParams_reset->Mode = 6; - - /* Read SATA speed setting from CMOS */ - FchParams_reset->SataSetMaxGen2 = get_uint_option("sata_speed", 0); - printk(BIOS_DEBUG, "Force SATA 3Gbps mode = %x\n", FchParams_reset->SataSetMaxGen2); -} - -void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env) -{ - /* Azalia Controller OEM Codec Table Pointer */ - FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); - - /* Fan Control */ - FchParams_env->Imc.ImcEnable = FALSE; - FchParams_env->Hwm.HwMonitorEnable = FALSE; - FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */ - - /* Read SATA controller mode from CMOS */ - FchParams_env->Sata.SataClass = get_uint_option("sata_mode", 0); - - switch ((SATA_CLASS)FchParams_env->Sata.SataClass) { - case SataLegacyIde: - case SataRaid: - case SataAhci: - case SataAhci7804: - FchParams_env->Sata.SataIdeMode = FALSE; - printk(BIOS_DEBUG, "AHCI or RAID or IDE = %x\n", FchParams_env->Sata.SataClass); - break; - - case SataIde2Ahci: - case SataIde2Ahci7804: - default: /* SataNativeIde */ - FchParams_env->Sata.SataIdeMode = TRUE; - printk(BIOS_DEBUG, "IDE2AHCI = %x\n", FchParams_env->Sata.SataClass); - break; - } -} diff --git a/src/mainboard/asus/am1i-a/Kconfig b/src/mainboard/asus/am1i-a/Kconfig deleted file mode 100644 index 9a4c8e3d7a..0000000000 --- a/src/mainboard/asus/am1i-a/Kconfig +++ /dev/null @@ -1,53 +0,0 @@ -if BOARD_ASUS_AM1I_A - -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select BOARD_ROMSIZE_KB_8192 - select CPU_AMD_AGESA_FAMILY16_KB - select FORCE_AM1_SOCKET_SUPPORT - select GFXUMA - select HAVE_OPTION_TABLE - select HAVE_CMOS_DEFAULT - select HAVE_PIRQ_TABLE - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB - select SOUTHBRIDGE_AMD_AGESA_YANGTZE - select DEFAULT_POST_ON_LPC - select SUPERIO_ITE_IT8623E - select MEMORY_MAPPED_TPM - -config MAINBOARD_DIR - default "asus/am1i-a" - -config MAINBOARD_PART_NUMBER - default "AM1I-A" - -config HW_MEM_HOLE_SIZEK - hex - default 0x200000 - -config MAX_CPUS - int - default 4 - -config IRQ_SLOT_COUNT - int - default 10 - -config ONBOARD_VGA_IS_PRIMARY - bool - default y - -config HUDSON_LEGACY_FREE - bool - default n - -config HUDSON_IMC_FWM - bool - default n - -endif # BOARD_ASUS_AM1I_A diff --git a/src/mainboard/asus/am1i-a/Kconfig.name b/src/mainboard/asus/am1i-a/Kconfig.name deleted file mode 100644 index 840e821f65..0000000000 --- a/src/mainboard/asus/am1i-a/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_ASUS_AM1I_A - bool "AM1I-A" diff --git a/src/mainboard/asus/am1i-a/Makefile.inc b/src/mainboard/asus/am1i-a/Makefile.inc deleted file mode 100644 index 549801d78f..0000000000 --- a/src/mainboard/asus/am1i-a/Makefile.inc +++ /dev/null @@ -1,11 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += bootblock.c - -romstage-y += buildOpts.c -romstage-y += BiosCallOuts.c -romstage-y += OemCustomize.c - -ramstage-y += buildOpts.c -ramstage-y += BiosCallOuts.c -ramstage-y += OemCustomize.c diff --git a/src/mainboard/asus/am1i-a/OemCustomize.c b/src/mainboard/asus/am1i-a/OemCustomize.c deleted file mode 100644 index 246c93fe2e..0000000000 --- a/src/mainboard/asus/am1i-a/OemCustomize.c +++ /dev/null @@ -1,143 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <AGESA.h> -#include <PlatformMemoryConfiguration.h> - -#include <northbridge/amd/agesa/state_machine.h> - -static const PCIe_PORT_DESCRIPTOR PortList[] = { - { - 0, - PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 3, 3), - PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 5, - HotplugDisabled, - PcieGenMaxSupported, - PcieGenMaxSupported, - AspmDisabled, 0x01, 0) - }, - /* Initialize Port descriptor (PCIe port, Lanes 1, PCI Device Number 2, ...) */ - { - 0, - PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 2, 2), - PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 4, - HotplugDisabled, - PcieGenMaxSupported, - PcieGenMaxSupported, - AspmDisabled, 0x02, 0) - }, - /* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */ - { - 0, - PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 1, 1), - PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 3, - HotplugDisabled, - PcieGenMaxSupported, - PcieGenMaxSupported, - AspmDisabled, 0x03, 0) - }, - /* Initialize Port descriptor (PCIe port, Lanes 3, PCI Device Number 2, ...) */ - { - 0, - PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 0, 0), - PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 2, - HotplugDisabled, - PcieGenMaxSupported, - PcieGenMaxSupported, - AspmDisabled, 0x04, 0) - }, - /* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 4, ...) */ - { - DESCRIPTOR_TERMINATE_LIST, - PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 4, 7), - PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 1, - HotplugDisabled, - PcieGenMaxSupported, - PcieGenMaxSupported, - AspmDisabled, 0x05, 0) - } -}; - -static const PCIe_DDI_DESCRIPTOR DdiList[] = { - /* DP0 to HDMI */ - { - 0, - PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 8, 11), - PCIE_DDI_DATA_INITIALIZER(ConnectorTypeHDMI, Aux1, Hdp1) - }, - /* DP1 to DVI-D */ - { - 0, - PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 12, 15), - PCIE_DDI_DATA_INITIALIZER(ConnectorTypeSingleLinkDVI, Aux2, Hdp2) - }, - /* DP2 to VGA */ - { - DESCRIPTOR_TERMINATE_LIST, - PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 16, 19), - PCIE_DDI_DATA_INITIALIZER(ConnectorTypeCrt, Aux3, Hdp3) - }, -}; - -static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = { - .Flags = DESCRIPTOR_TERMINATE_LIST, - .SocketId = 0, - .PciePortList = PortList, - .DdiLinkList = DdiList -}; - -void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) -{ - FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface; - - FchReset->Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); - FchReset->Xhci1Enable = CONFIG(HUDSON_XHCI_ENABLE); - - FchReset->SataEnable = 1; - FchReset->IdeEnable = 0; -} - -void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) -{ - InitEarly->GnbConfig.PcieComplexList = &PcieComplex; -} - -/*---------------------------------------------------------------------------------------- - * CUSTOMER OVERRIDES MEMORY TABLE - *---------------------------------------------------------------------------------------- - */ - -/* - * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA - * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable - * is populated, AGESA will base its settings on the data from the table. Otherwise, it will - * use its default conservative settings. - */ -static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { - #define SEED_A 0x12 - HW_RXEN_SEED( - ANY_SOCKET, CHANNEL_A, ALL_DIMMS, - SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, - SEED_A), - - NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 2), - NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 1), - MOTHER_BOARD_LAYERS(LAYERS_4), - - MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00), - CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), /* TODO: bit2map, bit3map */ - ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), - CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00), - - PSO_END -}; - -void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) -{ - InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; -} - -void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid) -{ - /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ - InitMid->GnbMidConfiguration.iGpuVgaMode = 0; -} diff --git a/src/mainboard/asus/am1i-a/OptionsIds.h b/src/mainboard/asus/am1i-a/OptionsIds.h deleted file mode 100644 index 130d8525ab..0000000000 --- a/src/mainboard/asus/am1i-a/OptionsIds.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/** - * @file - * - * IDS Option File - * - * This file is used to switch on/off IDS features. - * - */ -#ifndef _OPTION_IDS_H_ -#define _OPTION_IDS_H_ - -/** - * - * This file generates the defaults tables for the Integrated Debug Support - * Module. The documented build options are imported from a user controlled - * file for processing. The build options for the Integrated Debug Support - * Module are listed below: - * - * IDSOPT_IDS_ENABLED - * IDSOPT_ERROR_TRAP_ENABLED - * IDSOPT_CONTROL_ENABLED - * IDSOPT_TRACING_ENABLED - * IDSOPT_PERF_ANALYSIS - * IDSOPT_ASSERT_ENABLED - * IDSOPT_CAR_CORRUPTION_CHECK_ENABLED - * - **/ - -#define IDSOPT_IDS_ENABLED TRUE -//#define IDSOPT_CONTROL_ENABLED TRUE -//#define IDSOPT_TRACING_ENABLED TRUE -#define IDSOPT_TRACING_CONSOLE_SERIALPORT TRUE -//#define IDSOPT_PERF_ANALYSIS TRUE -#define IDSOPT_ASSERT_ENABLED TRUE - -#endif diff --git a/src/mainboard/asus/am1i-a/acpi/mainboard.asl b/src/mainboard/asus/am1i-a/acpi/mainboard.asl deleted file mode 100644 index 9b18e722c7..0000000000 --- a/src/mainboard/asus/am1i-a/acpi/mainboard.asl +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - - -/* AcpiGpe0Blk */ -OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04) - Field(GP0B, ByteAcc, NoLock, Preserve) { - , 11, - USBS, 1, -} diff --git a/src/mainboard/asus/am1i-a/acpi/routing.asl b/src/mainboard/asus/am1i-a/acpi/routing.asl deleted file mode 100644 index 6247bbf18f..0000000000 --- a/src/mainboard/asus/am1i-a/acpi/routing.asl +++ /dev/null @@ -1,162 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* Routing is in System Bus scope */ -Name(PR0, Package(){ - /* NB devices */ - /* Bus 0, Dev 0 - F16 Host Controller */ - - /* Bus 0, Dev 1, Func 0 - PCI Bridge for Internal Graphics(IGP) */ - /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */ - Package(){0x0001FFFF, 0, INTA, 0 }, - Package(){0x0001FFFF, 1, INTB, 0 }, - - /* Bus 0, Dev 2 - PCIe Bridges */ - Package(){0x0002FFFF, 0, INTA, 0 }, - Package(){0x0002FFFF, 1, INTB, 0 }, - Package(){0x0002FFFF, 2, INTC, 0 }, - Package(){0x0002FFFF, 3, INTD, 0 }, - - /* FCH devices */ - /* Bus 0, Dev 14 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ - Package(){0x0014FFFF, 0, INTA, 0 }, - Package(){0x0014FFFF, 1, INTB, 0 }, - Package(){0x0014FFFF, 2, INTC, 0 }, - Package(){0x0014FFFF, 3, INTD, 0 }, - - /* Bus 0, Dev 12 Func 0 - USB: OHCI */ - /* Bus 0, Dev 12 Func 2 - USB: EHCI */ - Package(){0x0012FFFF, 0, INTC, 0 }, - Package(){0x0012FFFF, 1, INTB, 0 }, - - /* Bus 0, Dev 13 Func 0 - USB: OHCI */ - /* Bus 0, Dev 13 Func 2 - USB: EHCI */ - Package(){0x0013FFFF, 0, INTC, 0 }, - Package(){0x0013FFFF, 1, INTB, 0 }, - - /* Bus 0, Dev 16 Func 0 - USB: OHCI */ - /* Bus 0, Dev 16 Func 2 - USB: EHCI */ - Package(){0x0016FFFF, 0, INTC, 0 }, - Package(){0x0016FFFF, 1, INTB, 0 }, - - /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ - Package(){0x0010FFFF, 0, INTC, 0 }, - Package(){0x0010FFFF, 1, INTB, 0 }, - - /* Bus 0, Dev 11 - SATA controller */ - Package(){0x0011FFFF, 0, INTD, 0 }, -}) - -Name(APR0, Package(){ - /* NB devices in APIC mode */ - /* Bus 0, Dev 0 - F16 Host Controller */ - - /* Bus 0, Dev 1, Func 0 - PCI Bridge for Internal Graphics(IGP) */ - /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */ - Package(){0x0001FFFF, 0, 0, 44 }, - Package(){0x0001FFFF, 1, 0, 45 }, - - /* Bus 0, Dev 2 - PCIe Bridges */ - Package(){0x0002FFFF, 0, 0, 24 }, - Package(){0x0002FFFF, 1, 0, 25 }, - Package(){0x0002FFFF, 2, 0, 26 }, - Package(){0x0002FFFF, 3, 0, 27 }, - - /* SB devices in APIC mode */ - /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ - Package(){0x0014FFFF, 0, 0, 16 }, - Package(){0x0014FFFF, 1, 0, 17 }, - Package(){0x0014FFFF, 2, 0, 18 }, - Package(){0x0014FFFF, 3, 0, 19 }, - - /* Bus 0, Dev 12 Func 0 - USB: OHCI */ - /* Bus 0, Dev 12 Func 1 - USB: EHCI */ - Package(){0x0012FFFF, 0, 0, 18 }, - Package(){0x0012FFFF, 1, 0, 17 }, - - /* Bus 0, Dev 13 Func 0 - USB: OHCI */ - /* Bus 0, Dev 13 Func 1 - USB: EHCI */ - Package(){0x0013FFFF, 0, 0, 18 }, - Package(){0x0013FFFF, 1, 0, 17 }, - - /* Bus 0, Dev 16 Func 0 - USB: OHCI */ - /* Bus 0, Dev 16 Func 1 - USB: EHCI */ - Package(){0x0016FFFF, 0, 0, 18 }, - Package(){0x0016FFFF, 1, 0, 17 }, - - /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ - Package(){0x0010FFFF, 0, 0, 18 }, - Package(){0x0010FFFF, 1, 0, 17 }, - - /* Bus 0, Dev 11 - SATA controller */ - Package(){0x0011FFFF, 0, 0, 19 }, -}) - -/* GPP 0 - PCIe 4x slot */ -Name(PS4, Package(){ - Package(){0x0000FFFF, 0, INTA, 0 }, - Package(){0x0000FFFF, 1, INTB, 0 }, - Package(){0x0000FFFF, 2, INTC, 0 }, - Package(){0x0000FFFF, 3, INTD, 0 }, -}) -Name(APS4, Package(){ - Package(){0x0000FFFF, 0, 0, 24 }, - Package(){0x0000FFFF, 1, 0, 25 }, - Package(){0x0000FFFF, 2, 0, 26 }, - Package(){0x0000FFFF, 3, 0, 27 }, -}) - -/* GPP 1 - not used */ -Name(PS5, Package(){ - Package(){0x0000FFFF, 0, INTB, 0 }, - Package(){0x0000FFFF, 1, INTC, 0 }, - Package(){0x0000FFFF, 2, INTD, 0 }, - Package(){0x0000FFFF, 3, INTA, 0 }, -}) -Name(APS5, Package(){ - Package(){0x0000FFFF, 0, 0, 28 }, - Package(){0x0000FFFF, 1, 0, 29 }, - Package(){0x0000FFFF, 2, 0, 30 }, - Package(){0x0000FFFF, 3, 0, 31 }, -}) - -/* GPP 2 - not used */ -Name(PS6, Package(){ - Package(){0x0000FFFF, 0, INTC, 0 }, - Package(){0x0000FFFF, 1, INTD, 0 }, - Package(){0x0000FFFF, 2, INTA, 0 }, - Package(){0x0000FFFF, 3, INTB, 0 }, -}) -Name(APS6, Package(){ - Package(){0x0000FFFF, 0, 0, 32 }, - Package(){0x0000FFFF, 1, 0, 33 }, - Package(){0x0000FFFF, 2, 0, 34 }, - Package(){0x0000FFFF, 3, 0, 35 }, -}) - -/* GPP 3 - not used */ -Name(PS7, Package(){ - Package(){0x0000FFFF, 0, INTD, 0 }, - Package(){0x0000FFFF, 1, INTA, 0 }, - Package(){0x0000FFFF, 2, INTB, 0 }, - Package(){0x0000FFFF, 3, INTC, 0 }, -}) -Name(APS7, Package(){ - Package(){0x0000FFFF, 0, 0, 36 }, - Package(){0x0000FFFF, 1, 0, 37 }, - Package(){0x0000FFFF, 2, 0, 38 }, - Package(){0x0000FFFF, 3, 0, 39 }, -}) - -/* GPP 4 - Realtek GBE */ -Name(PS8, Package(){ - Package(){0x0000FFFF, 0, INTB, 0 }, - Package(){0x0000FFFF, 1, INTC, 0 }, - Package(){0x0000FFFF, 2, INTD, 0 }, - Package(){0x0000FFFF, 3, INTA, 0 }, -}) -Name(APS8, Package(){ - Package(){0x0000FFFF, 0, 0, 40 }, - Package(){0x0000FFFF, 1, 0, 41 }, - Package(){0x0000FFFF, 2, 0, 42 }, - Package(){0x0000FFFF, 3, 0, 43 }, -}) diff --git a/src/mainboard/asus/am1i-a/acpi/sata.asl b/src/mainboard/asus/am1i-a/acpi/sata.asl deleted file mode 100644 index 27e5222c58..0000000000 --- a/src/mainboard/asus/am1i-a/acpi/sata.asl +++ /dev/null @@ -1,118 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -Name(STTM, Buffer(20) { - 0x78, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, - 0x78, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, - 0x1f, 0x00, 0x00, 0x00 -}) - -/* Start by clearing the PhyRdyChg bits */ -Method(_INI) { - \_GPE._L1F() -} - -Device(PMRY) -{ - Name(_ADR, 0) - Method(_GTM, 0x0, NotSerialized) { - Return(STTM) - } - Method(_STM, 0x3, NotSerialized) {} - - Device(PMST) { - Name(_ADR, 0) - Method(_STA,0) { - if (P0IS > 0) { - return (0x0F) /* sata is visible */ - } - else { - return (0x00) /* sata is missing */ - } - } - }/* end of PMST */ - - Device(PSLA) - { - Name(_ADR, 1) - Method(_STA,0) { - if (P1IS > 0) { - return (0x0F) /* sata is visible */ - } - else { - return (0x00) /* sata is missing */ - } - } - } /* end of PSLA */ -} /* end of PMRY */ - -Device(SEDY) -{ - Name(_ADR, 1) /* IDE Scondary Channel */ - Method(_GTM, 0x0, NotSerialized) { - Return(STTM) - } - Method(_STM, 0x3, NotSerialized) {} - - Device(SMST) - { - Name(_ADR, 0) - Method(_STA,0) { - if (P2IS > 0) { - return (0x0F) /* sata is visible */ - } - else { - return (0x00) /* sata is missing */ - } - } - } /* end of SMST */ - - Device(SSLA) - { - Name(_ADR, 1) - Method(_STA,0) { - if (P3IS > 0) { - return (0x0F) /* sata is visible */ - } - else { - return (0x00) /* sata is missing */ - } - } - } /* end of SSLA */ -} /* end of SEDY */ - -/* SATA Hot Plug Support */ -Scope(\_GPE) { - Method(_L1F,0x0,NotSerialized) { - if (\_SB.P0PR) { - if (\_SB.P0IS > 0) { - sleep(32) - } - Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - \_SB.P0PR = 1 - } - - if (\_SB.P1PR) { - if (\_SB.P1IS > 0) { - sleep(32) - } - Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - \_SB.P1PR = 1 - } - - if (\_SB.P2PR) { - if (\_SB.P2IS > 0) { - sleep(32) - } - Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - \_SB.P2PR = 1 - } - - if (\_SB.P3PR) { - if (\_SB.P3IS > 0) { - sleep(32) - } - Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - \_SB.P3PR = 1 - } - } -} diff --git a/src/mainboard/asus/am1i-a/acpi/sleep.asl b/src/mainboard/asus/am1i-a/acpi/sleep.asl deleted file mode 100644 index fc26c306d9..0000000000 --- a/src/mainboard/asus/am1i-a/acpi/sleep.asl +++ /dev/null @@ -1,64 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* Wake status package */ -Name(WKST,Package(){Zero, Zero}) - -/* -* \_PTS - Prepare to Sleep method -* -* Entry: -* Arg0=The value of the sleeping state S1=1, S2=2, etc -* -* Exit: -* -none- -* -* The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This -* control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to -* the ACPI driver. This method cannot modify the configuration or power -* state of any device in the system. -*/ - -External(\_SB.APTS, MethodObj) -External(\_SB.AWAK, MethodObj) - -Method(_PTS, 1) { - /* DBGO("\\_PTS\n") */ - /* DBGO("From S0 to S") */ - /* DBGO(Arg0) */ - /* DBGO("\n") */ - - /* Clear wake status structure. */ - WKST [0] = 0 - WKST [1] = 0 - UPWS = 7 - \_SB.APTS(Arg0) -} /* End Method(\_PTS) */ - -/* -* \_WAK System Wake method -* -* Entry: -* Arg0=The value of the sleeping state S1=1, S2=2 -* -* Exit: -* Return package of 2 DWords -* Dword 1 - Status -* 0x00000000 wake succeeded -* 0x00000001 Wake was signaled but failed due to lack of power -* 0x00000002 Wake was signaled but failed due to thermal condition -* Dword 2 - Power Supply state -* if non-zero the effective S-state the power supply entered -*/ -Method(\_WAK, 1) { - /* DBGO("\\_WAK\n") */ - /* DBGO("From S") */ - /* DBGO(Arg0) */ - /* DBGO(" to S0\n") */ - USBS = 1 - - \_SB.AWAK(Arg0) - - Return(WKST) -} /* End Method(\_WAK) */ diff --git a/src/mainboard/asus/am1i-a/acpi/superio.asl b/src/mainboard/asus/am1i-a/acpi/superio.asl deleted file mode 100644 index bd06c9efb3..0000000000 --- a/src/mainboard/asus/am1i-a/acpi/superio.asl +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -// Scope is \_SB.PCI0.LPCB - -// Values, defined here, must match settings in devicetree.cb - -Device (PS2M) { - Name (_HID, EisaId ("PNP0F13")) - Name (_CRS, ResourceTemplate () { - IRQNoFlags () {12} - }) -} - -Device (PS2K) { - Name (_HID, EisaId ("PNP0303")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x0060, 0x0060, 0x00, 0x01) - IO (Decode16, 0x0064, 0x0064, 0x00, 0x01) - IRQNoFlags () {1} - }) -} - -Device (COM1) { - Name (_HID, EISAID ("PNP0501")) - Name (_UID, 1) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x03F8, 0x03F8, 0x08, 0x08) - IRQNoFlags () {4} - }) - Name (_PRS, ResourceTemplate () - { - IO (Decode16, 0x03F8, 0x03F8, 0x08, 0x08) - IRQNoFlags () {4} - }) -} - -Device (COM2) { - Name (_HID, EISAID ("PNP0501")) - Name (_UID, 2) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x02F8, 0x02F8, 0x08, 0x08) - IRQNoFlags () {3} - }) - Name (_PRS, ResourceTemplate () - { - IO (Decode16, 0x02F8, 0x02F8, 0x08, 0x08) - IRQNoFlags () {3} - }) -} - -Device (LPT1) { - Name (_HID, EISAID ("PNP0401")) - Name (_UID, 1) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0378, 0x0378, 0x04, 0x08) - IO (Decode16, 0x0778, 0x0778, 0x04, 0x08) - IRQNoFlags () {5} - }) - Name (_PRS, ResourceTemplate () - { - IO (Decode16, 0x0378, 0x0378, 0x04, 0x08) - IO (Decode16, 0x0778, 0x0778, 0x04, 0x08) - IRQNoFlags () {5} - }) -} - -Device (ENVC) { - Name (_HID, EISAID ("PNP0C02")) - Name (_UID, 1) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0230, 0x0230, 0x04, 0x10) - IO (Decode16, 0x0290, 0x0290, 0x04, 0x10) - }) - Name (_PRS, ResourceTemplate () - { - IO (Decode16, 0x0230, 0x0230, 0x04, 0x10) - IO (Decode16, 0x0290, 0x0290, 0x04, 0x10) - }) -} - -Device (GPIC) { - Name (_HID, EISAID ("PNP0C02")) - Name (_UID, 2) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0300, 0x0300, 0x04, 0x20) - }) - Name (_PRS, ResourceTemplate () - { - IO (Decode16, 0x0300, 0x0300, 0x04, 0x20) - }) -} diff --git a/src/mainboard/asus/am1i-a/board_info.txt b/src/mainboard/asus/am1i-a/board_info.txt deleted file mode 100644 index 4873e82d5d..0000000000 --- a/src/mainboard/asus/am1i-a/board_info.txt +++ /dev/null @@ -1,5 +0,0 @@ -Category: mini -Board URL: https://www.asus.com/us/Motherboards/AM1IA/ -ROM package: DIP8 -ROM protocol: SPI -ROM socketed: y diff --git a/src/mainboard/asus/am1i-a/bootblock.c b/src/mainboard/asus/am1i-a/bootblock.c deleted file mode 100644 index b465a55f44..0000000000 --- a/src/mainboard/asus/am1i-a/bootblock.c +++ /dev/null @@ -1,132 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <amdblocks/acpimmio.h> -#include <arch/io.h> -#include <bootblock_common.h> -#include <device/pnp_ops.h> -#include <superio/ite/common/ite.h> -#include <superio/ite/it8623e/it8623e.h> - -#if CONFIG_UART_FOR_CONSOLE == 0 -#define SERIAL_DEV PNP_DEV(0x2e, IT8623E_SP1) -#elif CONFIG_UART_FOR_CONSOLE == 1 -#define SERIAL_DEV PNP_DEV(0x2e, IT8623E_SP2) -#else -#error "Invalid value for CONFIG_UART_FOR_CONSOLE" -#endif - -#define GPIO_DEV PNP_DEV(0x2e, IT8623E_GPIO) -#define CLKIN_DEV PNP_DEV(0x2e, IT8623E_GPIO) -#define ENVC_DEV PNP_DEV(0x2e, IT8623E_EC) - -/* Sets up EC configuration as per vendor defaults */ -static void ite_evc_conf(pnp_devfn_t dev) -{ - pnp_set_enable(dev, 0); - ite_reg_write(dev, 0x70, 0x00); - ite_reg_write(dev, 0xf0, 0x00); - ite_reg_write(dev, 0xf1, 0x00); - ite_reg_write(dev, 0xf2, 0x06); - ite_reg_write(dev, 0xf3, 0x00); - ite_reg_write(dev, 0xf4, 0x00); - ite_reg_write(dev, 0xf5, 0x36); - ite_reg_write(dev, 0xf6, 0x03); - ite_reg_write(dev, 0xf9, 0x48); - ite_reg_write(dev, 0xfa, 0x00); - ite_reg_write(dev, 0xfb, 0x10); - pnp_set_enable(dev, 1); -} - -/* - * Sets up GPIO configuration as per vendor defaults - * SIO defaults are unknown therefore all GPIO pins are configured -*/ -static void ite_gpio_conf(pnp_devfn_t dev) -{ - ite_reg_write(dev, 0x23, 0x08); - ite_reg_write(dev, 0x25, 0x10); - ite_reg_write(dev, 0x26, 0x00); - ite_reg_write(dev, 0x27, 0x80); - ite_reg_write(dev, 0x28, 0x45); - ite_reg_write(dev, 0x29, 0x00); - ite_reg_write(dev, 0x2a, 0x00); - ite_reg_write(dev, 0x2b, 0x48); - ite_reg_write(dev, 0x2c, 0x10); - ite_reg_write(dev, 0x2d, 0x80); - ite_reg_write(dev, 0x71, 0x00); - ite_reg_write(dev, 0x72, 0x00); - ite_reg_write(dev, 0x73, 0x38); - ite_reg_write(dev, 0x74, 0x00); - ite_reg_write(dev, 0xb0, 0x00); - ite_reg_write(dev, 0xb1, 0x00); - ite_reg_write(dev, 0xb2, 0x00); - ite_reg_write(dev, 0xb3, 0x00); - ite_reg_write(dev, 0xb4, 0x00); - ite_reg_write(dev, 0xb8, 0x00); - ite_reg_write(dev, 0xb9, 0x00); - ite_reg_write(dev, 0xba, 0x00); - ite_reg_write(dev, 0xbb, 0x00); - ite_reg_write(dev, 0xbc, 0x00); - ite_reg_write(dev, 0xbd, 0x00); - ite_reg_write(dev, 0xc0, 0x01); - ite_reg_write(dev, 0xc1, 0x00); - ite_reg_write(dev, 0xc2, 0x00); - ite_reg_write(dev, 0xc3, 0x00); - ite_reg_write(dev, 0xc4, 0x00); - ite_reg_write(dev, 0xc8, 0x01); - ite_reg_write(dev, 0xc9, 0x00); - ite_reg_write(dev, 0xca, 0x00); - ite_reg_write(dev, 0xcb, 0x00); - ite_reg_write(dev, 0xcc, 0x00); - ite_reg_write(dev, 0xcd, 0x20); - ite_reg_write(dev, 0xce, 0x00); - ite_reg_write(dev, 0xcf, 0x00); - ite_reg_write(dev, 0xe0, 0x00); - ite_reg_write(dev, 0xe1, 0x00); - ite_reg_write(dev, 0xe2, 0x00); - ite_reg_write(dev, 0xe3, 0x00); - ite_reg_write(dev, 0xe4, 0x00); - ite_reg_write(dev, 0xe9, 0x21); - ite_reg_write(dev, 0xf0, 0x00); - ite_reg_write(dev, 0xf1, 0x00); - ite_reg_write(dev, 0xf2, 0x00); - ite_reg_write(dev, 0xf3, 0x00); - ite_reg_write(dev, 0xf4, 0x00); - ite_reg_write(dev, 0xf5, 0x00); - ite_reg_write(dev, 0xf6, 0x00); - ite_reg_write(dev, 0xf7, 0x00); - ite_reg_write(dev, 0xf8, 0x00); - ite_reg_write(dev, 0xf9, 0x00); - ite_reg_write(dev, 0xfa, 0x00); - ite_reg_write(dev, 0xfb, 0x00); -} - -void bootblock_mainboard_early_init(void) -{ - u32 i; - - /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ - pm_write8(0xea, 0x1); - - /* Configure ClkDrvStr1 settings */ - misc_write32(0x24, 0x030800aa); - - /* Configure MiscClkCntl1 settings */ - misc_write32(0x40, 0x000c4050); - - /* Configure SIO as made under vendor BIOS */ - ite_gpio_conf(GPIO_DEV); - ite_evc_conf(ENVC_DEV); - - /* Enable serial output on it8623e */ - ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48); - ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - ite_kill_watchdog(GPIO_DEV); - - /* - * On Larne, after LpcClkDrvSth is set, it needs some time to be stable, - * because of the buffer ICS551M - */ - for (i = 0; i < 200000; i++) - inb(0xcd6); -} diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c deleted file mode 100644 index d143cc3967..0000000000 --- a/src/mainboard/asus/am1i-a/buildOpts.c +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <vendorcode/amd/agesa/f16kb/AGESA.h> - -/* Include the files that instantiate the configuration definitions. */ -#include <vendorcode/amd/agesa/f16kb/Include/AdvancedApi.h> -#include <vendorcode/amd/agesa/f16kb/Include/GnbInterface.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuFamilyTranslation.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/Family/cpuFamRegisters.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatures.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.h> -/* AGESA nonsense: the next three headers depend on heapManager.h */ -#include <vendorcode/amd/agesa/f16kb/Proc/Common/CreateStruct.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h> -#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuLateInit.h> - -/* Select the CPU family */ -#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE - -/* Select the CPU socket type */ -#define INSTALL_FT3_SOCKET_SUPPORT TRUE - -//#define BLDOPT_REMOVE_UDIMMS_SUPPORT TRUE -//#define BLDOPT_REMOVE_RDIMMS_SUPPORT TRUE -//#define BLDOPT_REMOVE_LRDIMMS_SUPPORT TRUE -#define BLDOPT_REMOVE_ECC_SUPPORT TRUE -//#define BLDOPT_REMOVE_SRAT FALSE -#define BLDOPT_REMOVE_WHEA FALSE -#define BLDOPT_REMOVE_CRAT TRUE -#define BLDOPT_REMOVE_CDIT TRUE - -/* Build configuration values here. */ -#define BLDCFG_AMD_PLATFORM_TYPE AMD_PLATFORM_DESKTOP - -#define BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT DDR1600_FREQUENCY -#define BLDCFG_MEMORY_RDIMM_CAPABLE TRUE -#define BLDCFG_MEMORY_UDIMM_CAPABLE TRUE -#define BLDCFG_MEMORY_SODIMM_CAPABLE FALSE -#define BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING FALSE -#define BLDCFG_MEMORY_CHANNEL_INTERLEAVING FALSE -#define BLDCFG_MEMORY_CLOCK_SELECT DDR1600_FREQUENCY -#define BLDCFG_IGNORE_SPD_CHECKSUM TRUE -#define BLDCFG_ENABLE_ECC_FEATURE FALSE -#define BLDCFG_ECC_SYNC_FLOOD FALSE - -/* - * Specify the default values for the VRM controlling the VDDNB plane. - * If not specified, the values used for the core VRM will be applied - */ -#define BLDCFG_VRM_NB_LOW_POWER_THRESHOLD 0 - -#define BLDCFG_IOMMU_SUPPORT FALSE - -#define BLDCFG_CFG_GNB_HD_AUDIO TRUE - -/* AGESA nonsense: this header depends on the definitions above */ -#include <PlatformInstall.h> diff --git a/src/mainboard/asus/am1i-a/cmos.default b/src/mainboard/asus/am1i-a/cmos.default deleted file mode 100644 index 53a5d35471..0000000000 --- a/src/mainboard/asus/am1i-a/cmos.default +++ /dev/null @@ -1,4 +0,0 @@ -boot_option=Fallback -debug_level=Debug -sata_mode=IDE -sata_speed=6Gbps diff --git a/src/mainboard/asus/am1i-a/cmos.layout b/src/mainboard/asus/am1i-a/cmos.layout deleted file mode 100644 index 40d77fda92..0000000000 --- a/src/mainboard/asus/am1i-a/cmos.layout +++ /dev/null @@ -1,50 +0,0 @@ -#***************************************************************************** -# SPDX-License-Identifier: GPL-2.0-only - -#***************************************************************************** - -entries - -#start-bit length config config-ID name -0 384 r 0 reserved_memory -384 1 e 4 boot_option -388 4 r 0 reboot_counter -#400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 r 0 boot_index -432 8 r 0 boot_countdown -440 8 e 10 sata_mode -448 8 e 11 sata_speed -#728 256 h 0 user_data -984 16 h 0 check_sum -# Reserve the extended AMD configuration registers -1000 24 r 0 amd_reserved - -enumerations - -#ID value text -#1 0 Disable -#1 1 Enable -4 0 Fallback -4 1 Normal -6 5 Notice -6 6 Info -6 7 Debug -6 8 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -10 0 IDE -10 2 AHCI -11 1 3Gbps -11 0 6Gbps - -checksums - -checksum 392 455 984 diff --git a/src/mainboard/asus/am1i-a/devicetree.cb b/src/mainboard/asus/am1i-a/devicetree.cb deleted file mode 100644 index be9ce8a87d..0000000000 --- a/src/mainboard/asus/am1i-a/devicetree.cb +++ /dev/null @@ -1,91 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -chip northbridge/amd/agesa/family16kb/root_complex - device cpu_cluster 0 on - chip cpu/amd/agesa/family16kb - device lapic 0 on end - end - end - - device domain 0 on - subsystemid 0x1043 0x8623 inherit - chip northbridge/amd/agesa/family16kb - device pci 0.0 on end # Root Complex - device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 - device pci 1.1 on end # Internal Multimedia - device pci 2.0 on end # Host Bridge - device pci 2.1 on end # x4 PCIe slot - device pci 2.2 off end # GPP Bridge 1 - not used - device pci 2.3 off end # GPP Bridge 2 - not used - device pci 2.4 off end # GPP Bridge 3 - not used - device pci 2.5 on end # Realtek GBE - end #chip northbridge/amd/agesa/family16kb - - chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus - device pci 10.0 on end # XHCI HC0 - device pci 11.0 on end # SATA - device pci 12.0 on end # USB - device pci 12.2 on end # USB - device pci 13.0 on end # USB - device pci 13.2 on end # USB - device pci 14.0 on end # SM - device pci 14.2 on end # HDA 0x4383 - device pci 14.3 on # LPC 0x439d - chip superio/ite/it8623e - device pnp 2e.0 off end # FDC - not used - device pnp 2e.1 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.2 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.3 on # Parallel port - io 0x60 = 0x378 - io 0x62 = 0x778 # for ECP mode - irq 0x70 = 5 - drq 0x74 = 3 - end - device pnp 2e.4 on # EC - io 0x60 = 0x290 - io 0x62 = 0x230 - end - device pnp 2e.5 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 2e.6 on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.7 on # GPIO - io 0x60 = 0x320 - io 0x62 = 0x300 - io 0x64 = 0x321 - end - end #superio/ite/it8623e - chip drivers/pc80/tpm - device pnp 4e.0 on end # TPM module - end - end #device pci 14.3 # LPC - device pci 14.7 off end # SD - no card reader present - device pci 16.0 on end # OHCI USB - device pci 16.2 on end # EHCI USB - end #chip southbridge/amd/agesa/hudson - - chip northbridge/amd/agesa/family16kb - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end - register "spdAddrLookup" = " - { - { {0xA0, 0xA2} }, - }" - end - - end #domain -end #northbridge/amd/agesa/family16kb/root_complex diff --git a/src/mainboard/asus/am1i-a/dsdt.asl b/src/mainboard/asus/am1i-a/dsdt.asl deleted file mode 100644 index a1efc5df20..0000000000 --- a/src/mainboard/asus/am1i-a/dsdt.asl +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* DefinitionBlock Statement */ -#include <acpi/acpi.h> -DefinitionBlock ( - "dsdt.aml", - "DSDT", - ACPI_DSDT_REV_2, - OEM_ID, - ACPI_TABLE_CREATOR, - 0x00010001 /* OEM Revision */ - ) -{ /* Start of ASL file */ - #include <acpi/dsdt_top.asl> - - /* Globals for the platform */ - #include "acpi/mainboard.asl" - - /* PCI IRQ mapping for the Southbridge */ - #include <southbridge/amd/agesa/hudson/acpi/pcie.asl> - - /* Describe the processor tree (\_SB) */ - #include <cpu/amd/agesa/family16kb/acpi/cpu.asl> - - /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/common/acpi/sleepstates.asl> - - /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ - #include "acpi/sleep.asl" - - /* System Bus */ - Scope(\_SB) { /* Start \_SB scope */ - /* global utility methods expected within the \_SB scope */ - #include <arch/x86/acpi/globutil.asl> - - /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */ - #include "acpi/routing.asl" - - Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - - Device(PCI0) { - /* Describe the AMD Northbridge */ - #include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl> - - /* Describe the AMD Fusion Controller Hub Southbridge */ - #include <southbridge/amd/agesa/hudson/acpi/fch.asl> - } - - /* Describe PCI INT[A-H] for the Southbridge */ - #include <southbridge/amd/agesa/hudson/acpi/pci_int.asl> - - } /* End \_SB scope */ - - /* Describe SMBUS for the Southbridge */ - #include <southbridge/amd/agesa/hudson/acpi/smbus.asl> -} -/* End of ASL file */ diff --git a/src/mainboard/asus/am1i-a/irq_tables.c b/src/mainboard/asus/am1i-a/irq_tables.c deleted file mode 100644 index 3e0606e6fb..0000000000 --- a/src/mainboard/asus/am1i-a/irq_tables.c +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <arch/pirq_routing.h> - -const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x14 << 3) | 0x3, /* Interrupt router dev */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x1002, /* Vendor */ - 0x439d, /* Device */ - 0, /* Miniport */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x3b, /* Checksum (has to be set to some value that - * would give 0 after the sum of all bytes - * for this structure (including checksum). - */ - /* clang-format off */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x01 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x00, (0x02 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0}, - {0x00, (0x10 << 3) | 0x0, {{0x03, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x00, (0x11 << 3) | 0x0, {{0x04, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x00, (0x12 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x00, (0x13 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x00, (0x14 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0}, - {0x00, (0x16 << 3) | 0x0, {{0x03, 0x9cb8}, {0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x01, (0x00 << 3) | 0x0, {{0x01, 0x9cb8}, {0x02, 0x9cb8}, {0x03, 0x9cb8}, {0x04, 0x9cb8}}, 0x0, 0x0}, - {0x02, (0x00 << 3) | 0x0, {{0x02, 0x9cb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - } - /* clang-format on */ -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/asus/am1i-a/mainboard.c b/src/mainboard/asus/am1i-a/mainboard.c deleted file mode 100644 index 0c00e6362f..0000000000 --- a/src/mainboard/asus/am1i-a/mainboard.c +++ /dev/null @@ -1,86 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/device.h> -#include <southbridge/amd/agesa/hudson/pci_devs.h> -#include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h> -#include <southbridge/amd/common/amd_pci_util.h> -#include <northbridge/amd/agesa/family16kb/pci_devs.h> - -static const u8 mainboard_picr_data[FCH_INT_TABLE_SIZE] = { - /* INTA# - INTH# */ - [0x00] = 0x03,0x04,0x05,0x07,0x1F,0x1F,0x1F,0x1F, - /* Misc-nil,0,1,2, INT from Serial irq */ - [0x08] = 0x5A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, - /* SCI, SMBUS0, ASF, HDA, FC, GEC, PerMon, SD */ - [0x10] = 0x1F,0x1F,0x1F,0x03,0x1F,0x1F,0x1F,0x1F, - /* IMC INT0 - 5 */ - [0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, - /* USB Devs 18/19/22 INTA-B */ - [0x30] = 0x05,0x04,0x05,0x04,0x05,0x04,0x1F,0x1F, - /* RSVD, SATA */ - [0x40] = 0x1F, 0x07 -}; - -static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = { - /* INTA# - INTH# */ - [0x00] = 0x10,0x11,0x12,0x13,0x1F,0x1F,0x1F,0x1F, - /* Misc-nil,0,1,2, INT from Serial irq */ - [0x08] = 0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F, - /* SCI, SMBUS0, ASF, HDA, FC, GEC, PerMon, SD */ - [0x10] = 0x09,0x1F,0x1F,0x10,0x1F,0x1F,0x1F,0x1F, - /* IMC INT0 - 5 */ - [0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, - /* USB Devs 18/19/22 INTA-B */ - [0x30] = 0x12,0x11,0x12,0x11,0x12,0x11,0x1F,0x1F, - /* RSVD, SATA */ - [0x40] = 0x1F, 0x13 -}; - -/* - * This table defines the index into the picr/intr_data - * tables for each device. Any enabled device and slot - * that uses hardware interrupts should have an entry - * in this table to define its index into the FCH - * PCI_INTR register 0xC00/0xC01. This index will define - * the interrupt that it should use. Putting PIRQ_A into - * the PIN A index for a device will tell that device to - * use PIC IRQ 10 if it uses PIN A for its hardware INT. - */ -static const struct pirq_struct mainboard_pirq_data[] = { - /* {PCI_devfn, {PIN A, PIN B, PIN C, PIN D}}, */ - {GFX_DEVFN, {PIRQ_A, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* VGA: 01.0 */ - {ACTL_DEVFN,{PIRQ_NC, PIRQ_B, PIRQ_NC, PIRQ_NC}}, /* Audio: 01.1 */ - {NB_PCIE_PORT1_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D}}, /* x4 PCIe: 02.1 */ - {NB_PCIE_PORT5_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A}}, /* Edge: 02.5 */ - {XHCI_DEVFN, {PIRQ_C, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* XHCI: 10.0 */ - {SATA_DEVFN, {PIRQ_SATA, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* SATA: 11.0 */ - {OHCI1_DEVFN, {PIRQ_OHCI1, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* OHCI1: 12.0 */ - {EHCI1_DEVFN, {PIRQ_NC, PIRQ_EHCI1, PIRQ_NC, PIRQ_NC}}, /* EHCI1: 12.2 */ - {OHCI2_DEVFN, {PIRQ_OHCI2, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* OHCI2: 13.0 */ - {EHCI2_DEVFN, {PIRQ_NC, PIRQ_EHCI2, PIRQ_NC, PIRQ_NC}}, /* EHCI2: 13.2 */ - {OHCI3_DEVFN, {PIRQ_OHCI3, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* OHCI3: 16.0 */ - {EHCI3_DEVFN, {PIRQ_NC, PIRQ_EHCI3, PIRQ_NC, PIRQ_NC}}, /* EHCI3: 16.2 */ - {HDA_DEVFN, {PIRQ_HDA, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* HDA: 14.2 */ -}; - -/* PIRQ Setup */ -static void pirq_setup(void) -{ - pirq_data_ptr = mainboard_pirq_data; - pirq_data_size = ARRAY_SIZE(mainboard_pirq_data); - intr_data_ptr = mainboard_intr_data; - picr_data_ptr = mainboard_picr_data; -} - -/********************************************** - * enable the dedicated function in mainboard. - **********************************************/ -static void mainboard_enable(struct device *dev) -{ - /* Initialize the PIRQ data structures for consumption */ - pirq_setup(); -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; |