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authorElyes HAOUAS <ehaouas@noos.fr>2019-12-08 11:34:24 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-12-10 11:16:07 +0000
commit13746076e95a611b56dfe37519685ae125172bb4 (patch)
tree3d41161b459454cfc89db62c9412e07f3ed1e8a0 /src/mainboard/asus
parente86ded841fdb3846b070a9cbe1793f72efe540aa (diff)
mainboard/(i945,ich7): Remove commented RCBA32(0x341c) code
PCIe root port clock gate is already enabled at i945/early_init.c Also fix comments when only PCIe root port is enabled. Change-Id: Ica38529dbdd5cc51b19b426999a1d9f0b678b4f5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37576 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/p5gc-mx/early_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asus/p5gc-mx/early_init.c b/src/mainboard/asus/p5gc-mx/early_init.c
index 6d37fed2ef..988d2328f6 100644
--- a/src/mainboard/asus/p5gc-mx/early_init.c
+++ b/src/mainboard/asus/p5gc-mx/early_init.c
@@ -94,7 +94,7 @@ static u8 msr_get_fsb(void)
void mainboard_late_rcba_config(void)
{
- /* Enable PCIe Root Port Clock Gate */
+ /* Enable only PCIe Root Port Clock Gate */
RCBA32(CG) = 0x00000001;
}