diff options
| author | Fabian Groffen <grobian@gentoo.org> | 2023-05-10 21:39:32 +0200 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-05-12 07:48:26 +0000 |
| commit | b20f8bd747a962cc7cb235e6d3c2b615bd9426d7 (patch) | |
| tree | ff1fb1ffa6585fdb84860ba98a58b03cafea9fcb /src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb | |
| parent | 316e2f469a034c60169db81e1a9bcadf57a27fb4 (diff) | |
mb/asus/p8z77-m: Make onboard NIC a child device below PCIe port 5
The Realtek RTL8111F NIC is currently not defined at all, nor as a child
device, resulting in the on_board flag not being set to 1. This means
that Linux / udev will call the device enp3s0 rather than eno0, as it's
appropriate for on-board ethernet devices.
Signed-off-by: Fabian Groffen <grobian@gentoo.org>
Change-Id: I95f01a466a59234d1cbe2420f208bf58ae28fcc6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb')
| -rw-r--r-- | src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb index c2455c9ab8..cad9c5c3a9 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb @@ -11,7 +11,10 @@ chip northbridge/intel/sandybridge device pci 1c.2 off end # PCIe Port #3 device pci 1c.3 off end # PCIe Port #4 device pci 1c.4 on end # PCIe Port #5 (PCIe x1 slot) - device pci 1c.5 on end # PCIe Port #6 + device pci 1c.5 on # PCIe Port #6 (RTL8111F GbE NIC) + subsystemid 0x1849 0x1e1a + device pci 00.0 on end # make onboard + end device pci 1c.6 on end # PCIe Port #7 (PCI slot via ASM1083) device pci 1c.7 off end # PCIe Port #8 device pci 1f.0 on # LPC bridge |