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authorFelix Held <felix-coreboot@felixheld.de>2021-01-28 23:07:48 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-01-29 22:56:17 +0000
commit86c24a24528d8e7042a894d17f7e0532bcb32e14 (patch)
tree223bf55e57c2f6f5ef4e96d256c7837c276bda10 /src/mainboard/asus/p5ql-em/cstates.c
parent2fae1c049407c11e393430de762d5ffa28b1a82e (diff)
soc/amd/cezanne/chip: add FSP silicon init driver call
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id3dea23de0c7ce2fca4382e9fd4ec88aecaa55fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/50092 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p5ql-em/cstates.c')
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