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authorSimon Yang <simon1.yang@intel.com>2022-09-06 18:30:51 +0800
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-09-08 14:19:57 +0000
commita16ed34638b32abe188c08f5027371658a299a1f (patch)
tree7af2d27a09ce75d5e5f5a302f955e22ddee9306b /src/mainboard/asus/p5qc/dsdt.asl
parent6e007516abdb9c4f1d57afdf81d7049393aedbad (diff)
soc/intel/alderlake: add power limits for Alder Lake-N 7W soc
Missing power limit setting for Alder-Lake-N 7W soc. Document reference: 645548 and 646929 BUG=b:245440443 BRANCH=None TEST=Build FW and test on nivviks board and there is no error message "unknown SA ID: 0x4617, skipped power limits configuration." Signed-off-by: Simon Yang <simon1.yang@intel.com> Change-Id: Iefe17f5b574cc319fe9aad3850401a8aa8e31270 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67374 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/asus/p5qc/dsdt.asl')
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