summaryrefslogtreecommitdiff
path: root/src/mainboard/asus/p5gc-mx
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-11-03 00:03:32 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-23 09:55:43 +0000
commit2c0aa00d6e562b2e6dbe580e188e24ce5e4336e2 (patch)
tree3e4f0749bda60dd17635765faf47541eb59a4b1c /src/mainboard/asus/p5gc-mx
parent447233ce8c25863c2236d0b208bff7f63cd738fb (diff)
mb/**/cmos.layout: Remove crusty comments
Most of these comments have been copy-pasted or serve no purpose other than to eventually turn into misleading info. While the description of the first 120 bits of CMOS could be useful, it should instead be added to the documentation for the CMOS option infrastructure, or /dev/null. Moreover, trim down newlines to no more than two consecutive newlines. Change-Id: I119b248821221e68c4e31edba71ba83b7d2e14e9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/asus/p5gc-mx')
-rw-r--r--src/mainboard/asus/p5gc-mx/cmos.layout7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/asus/p5gc-mx/cmos.layout b/src/mainboard/asus/p5gc-mx/cmos.layout
index a7c4b7dba7..356f38ec6f 100644
--- a/src/mainboard/asus/p5gc-mx/cmos.layout
+++ b/src/mainboard/asus/p5gc-mx/cmos.layout
@@ -3,22 +3,17 @@
# -----------------------------------------------------------------
entries
0 120 r 0 reserved_memory
-#120 264 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
388 4 h 0 reboot_counter
-#390 2 r 0 unused
# -----------------------------------------------------------------
# coreboot config options: console
-#392 3 r 0 unused
395 4 e 6 debug_level
-#399 1 r 0 unused
# coreboot config options: cpu
-#401 7 r 0 unused
# coreboot config options: southbridge
408 1 e 1 nmi
@@ -28,11 +23,9 @@ entries
# coreboot config options: bootloader
416 512 s 0 boot_devices
-#928 80 r 0 unused
# coreboot config options: check sums
984 16 h 0 check_sum
-#1000 24 r 0 amd_reserved
# RAM initialization internal data
1024 8 r 0 C0WL0REOST