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authorKerry She <Kerry.she@amd.com>2010-09-04 06:13:02 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-09-04 06:13:02 +0000
commit08c92e03bf46e40559a25062fc77258c0eff2efb (patch)
tree29b6c6f31a97ad5368945bb192483b3994cc2a89 /src/mainboard/asus/mew-vm
parentc9140530261213bcd1c0a1eb8e44b4b06a3a5877 (diff)
AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.
Signed-off-by: Kerry She <Kerry.she@amd.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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