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authorArthur Heymans <arthur@aheymans.xyz>2019-11-19 15:55:05 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-20 18:58:43 +0000
commitf2e42c4a8ec75c162251c72df8ac3da12e8a3eb9 (patch)
treefd5851ba2be3965df592355d02bce01f7dab0215 /src/mainboard/asus/m4a785t-m/acpi/cpstate.asl
parentad983eeec76ecdb2aff4fb47baeee95ade012225 (diff)
mb/*/*: Drop AMDFAM10 mainboards
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: Ic00ca18de3d73a17041a3a2839307149ad7902b2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36961 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/m4a785t-m/acpi/cpstate.asl')
-rw-r--r--src/mainboard/asus/m4a785t-m/acpi/cpstate.asl100
1 files changed, 0 insertions, 100 deletions
diff --git a/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl b/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl
deleted file mode 100644
index e9a93c0466..0000000000
--- a/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This file defines the processor and performance state capability
- * for each core in the system. It is included into the DSDT for each
- * core. It assumes that each core of the system has the same performance
- * characteristics.
-*/
-/*
-#include <arch/acpi.h>
-DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001)
- {
- Scope (\_PR) {
- Device (CPU0) {
- Name (_HID, "ACPI0007")
- Name (_UID, 0)
- #include "cpstate.asl"
- }
- Device (CPU1) {
- Name (_HID, "ACPI0007")
- Name (_UID, 1)
- #include "cpstate.asl"
- }
- Device (CPU2) {
- Name (_HID, "ACPI0007")
- Name (_UID, 2)
- #include "cpstate.asl"
- }
- Device (CPU3) {
- Name (_HID, "ACPI0007")
- Name (_UID, 3)
- #include "cpstate.asl"
- }
- }
-*/
- /* P-state support: The maximum number of P-states supported by the */
- /* CPUs we'll use is 6. */
- /* Get from AMI BIOS. */
- Name(_PSS, Package(){
- Package ()
- {
- 0x00000BB8,
- 0x000078D9,
- 0x00000004,
- 0x00000004,
- 0x00000000,
- 0x00000000
- },
-
- Package ()
- {
- 0x000008FC,
- 0x0000659A,
- 0x00000004,
- 0x00000004,
- 0x00000001,
- 0x00000001
- },
-
- Package ()
- {
- 0x00000708,
- 0x000056BF,
- 0x00000004,
- 0x00000004,
- 0x00000002,
- 0x00000002
- },
-
- Package ()
- {
- 0x00000320,
- 0x00001FA1,
- 0x00000004,
- 0x00000004,
- 0x00000003,
- 0x00000003
- }
- })
-
- Name(_PCT, Package(){
- ResourceTemplate(){Register(FFixedHW, 0, 0, 0)},
- ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}
- })
-
- Method(_PPC, 0){
- Return(0)
- }