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authorDenis 'GNUtoo' Carikli <GNUtoo@no-log.org>2013-05-09 16:14:59 +0200
committerRonald G. Minnich <rminnich@gmail.com>2013-05-10 17:27:05 +0200
commitb8b3e8bff32ee7dddcacec11e015f6683783eb2f (patch)
tree35d796573806d2668be19b38df3adb36252e6e6f /src/mainboard/asus/m4a785t-m/Kconfig
parente04dc7529fdeb2730b826b687fc365e9720d6647 (diff)
Asus M4A785T-M: Add CMOS defaults.
After removing power and the CMOS Battery, putting it back and booting coreboot we have: # ./nvramtool -a boot_option = Fallback last_boot = Fallback ECC_memory = Enable baud_rate = 115200 hw_scrubber = Enable interleave_chip_selects = Enable max_mem_clock = 400Mhz multi_core = Enable power_on_after_fail = Disable debug_level = Spew boot_first = HDD boot_second = Fallback_Floppy boot_third = Fallback_Network boot_index = 0xf boot_countdown = 0xc slow_cpu = off nmi = Enable iommu = Enable nvramtool: Can not read coreboot parameter user_data because layout info specifies CMOS area that is too wide. nvramtool: Warning: Coreboot CMOS checksum is bad. Change-Id: Ifa09c7a468e3e0713b426763266ae633e67d8397 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3224 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/asus/m4a785t-m/Kconfig')
-rw-r--r--src/mainboard/asus/m4a785t-m/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/asus/m4a785t-m/Kconfig b/src/mainboard/asus/m4a785t-m/Kconfig
index 10f6838ea7..6816d58ce0 100644
--- a/src/mainboard/asus/m4a785t-m/Kconfig
+++ b/src/mainboard/asus/m4a785t-m/Kconfig
@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT
select SUPERIO_ITE_IT8712F
select HAVE_OPTION_TABLE
+ select HAVE_CMOS_DEFAULT
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SB_HT_CHAIN_UNITID_OFFSET_ONLY