diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-11-24 14:17:49 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-05 22:30:57 +0100 |
| commit | b251a507140801ed86e43f7f6b88852af07c0d69 (patch) | |
| tree | 6c29a800f86376c67a194cab0187c8e5f713808e /src/mainboard/asus/kcma-d8/resourcemap.c | |
| parent | 4551b68c83e7693ae0b079dce9e4dcaf35050fa2 (diff) | |
mainboard/asus/kcma-d8: Add initial ASUS KCMA-D8 support
Change-Id: Idefa304a27823c741fab72ff5c2f20fed1aa5a39
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13523
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/asus/kcma-d8/resourcemap.c')
| -rw-r--r-- | src/mainboard/asus/kcma-d8/resourcemap.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/asus/kcma-d8/resourcemap.c b/src/mainboard/asus/kcma-d8/resourcemap.c index 8bcb28ba58..f7a2133867 100644 --- a/src/mainboard/asus/kcma-d8/resourcemap.c +++ b/src/mainboard/asus/kcma-d8/resourcemap.c @@ -196,7 +196,7 @@ static void setup_mb_resource_map(void) * This field defines the end of PCI I/O region n * [31:25] Reserved */ - PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC4), 0xFE000FC8, 0x00fff010, /* link 1 of cpu 0 --> AMD SR5690 */ + PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC4), 0xFE000FC8, 0x00fff020, /* link 2 of cpu 0 --> AMD SR5690 */ PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xCC), 0xFE000FC8, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xD4), 0xFE000FC8, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xDC), 0xFE000FC8, 0x00000000, @@ -267,7 +267,7 @@ static void setup_mb_resource_map(void) * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration region i */ - PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x05000103, /* link 1 of cpu 0 --> AMD SR5690 */ + PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x05000203, /* link 2 of cpu 0 --> AMD SR5690 */ PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000, @@ -451,7 +451,7 @@ static void setup_mb_resource_map(void) * This field defines the end of PCI I/O region n * [31:25] Reserved */ - PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC4), 0xFE000FC8, 0x00fff110, /* link 3 of cpu 0 --> AMD SR5690 */ + PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC4), 0xFE000FC8, 0x00fff020, /* link 2 of cpu 0 --> AMD SR5690 */ PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xCC), 0xFE000FC8, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xD4), 0xFE000FC8, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xDC), 0xFE000FC8, 0x00000000, @@ -522,7 +522,7 @@ static void setup_mb_resource_map(void) * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration region i */ - PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x05000303, /* link 3 of cpu 0 --> AMD SR5690 */ + PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x05000203, /* link 2 of cpu 0 --> AMD SR5690 */ PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000, |