diff options
| author | Paul Menzel <pmenzel@molgen.mpg.de> | 2020-10-17 18:11:51 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-11-20 16:01:16 +0000 |
| commit | bb1ada6d3a2866a6839ad2d44763184bc893f72f (patch) | |
| tree | cbe80d343a75e97161f0c8d9b3802eb137c5e876 /src/mainboard/asus/f2a85-m | |
| parent | 33f4ec82173f54a1f1f94506ca20fcec86953246 (diff) | |
mb/asus/f2a85-m_pro: Enable PCIe bridge 00:15.2 in AGESA
Currently, the PCIe bridge 00:15.2 is not detected by coreboot, causing
the connected network device also to be missing.
This is caused by not configuring the third of the four PCIe General
Purpose Ports (GPP) of the AMD Fusion Controller Hub (FCH), which can be
exposed as one to four PCIe devices.
So, enable it in AGESA but disable enumeration in coreboot. Otherwise,
the serial console stops working in romstage after
[…]
PCI: 00:15.1 bridge ctrl <- 0013
PCI: 00:15.1 cmd <- 06
PCI: 00:15.2 bridge ctrl <- 0013
PCI: 00:15.2 cmd <- 07
and the system hangs in the payload (SeaBIOS banner is shown on VGA
attached monitor).
TEST=Serial console and payload works, and Linux 5.10-rc2 configures
PCIe bridge. Output of `lspci -t`:
-[0000:00]-+-00.0
+-00.2
+-01.0
+-01.1
+-10.0
+-10.1
+-11.0
+-12.0
+-12.2
+-13.0
+-13.2
+-14.0
+-14.2
+-14.3
+-14.4-[01]--
+-14.5
+-15.0-[02]--
+-15.1-[03]----00.0
+-15.2-[04]----00.0
+-18.0
+-18.1
+-18.2
+-18.3
+-18.4
\-18.5
Change-Id: Ia1d60a212b0d249c7d8b3f8ec16baf5e93c985da
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46527
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/f2a85-m')
| -rw-r--r-- | src/mainboard/asus/f2a85-m/buildOpts.c | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb | 4 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c index 8600c27df9..a69614fd47 100644 --- a/src/mainboard/asus/f2a85-m/buildOpts.c +++ b/src/mainboard/asus/f2a85-m/buildOpts.c @@ -51,6 +51,7 @@ #define BLDCFG_FCH_GPP_LINK_CONFIG PortA1B1C1D1 #define BLDCFG_FCH_GPP_PORT0_PRESENT TRUE #define BLDCFG_FCH_GPP_PORT1_PRESENT TRUE +#define BLDCFG_FCH_GPP_PORT2_PRESENT CONFIG(BOARD_ASUS_F2A85_M_PRO) GPIO_CONTROL f2a85_m_gpio[] = { {-1} diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index 4e124f28e3..830d3a8bcd 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -111,7 +111,9 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 14.7 off end # Not present with BIOS ([AMD] FCH SD Flash Controller [1022:7806]) device pci 15.0 on end # PCI bridge device pci 15.1 on end # PCI bridge - device pci 15.2 on end # PCI bridge # Only present with the original boot firmware + # FIXME: serial console stops working when enabling resources + # for 15.2, and payloads hang + device pci 15.2 off end # PCI bridge end #chip southbridge/amd/hudson device pci 18.0 on end |