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authorMichał Żygowski <michal.zygowski@3mdeb.com>2019-12-01 17:42:04 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-12 19:28:33 +0000
commitaf258cc1791b5c46fcb13d41128cc99043a435be (patch)
tree3c143244682d60fed4172086832ae9e4ad66fd76 /src/mainboard/asus/f2a85-m
parentcbbfb702f693c1bbaf83a9d3d8a3c0caabda1814 (diff)
mb/*/*: use ACPIMMIO common block wherever possible
TEST=boot PC Engines apu2 and launch Debian Linux Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/f2a85-m')
-rw-r--r--src/mainboard/asus/f2a85-m/bootblock.c4
-rw-r--r--src/mainboard/asus/f2a85-m/romstage.c6
2 files changed, 3 insertions, 7 deletions
diff --git a/src/mainboard/asus/f2a85-m/bootblock.c b/src/mainboard/asus/f2a85-m/bootblock.c
index 0472877dc0..3d980a663d 100644
--- a/src/mainboard/asus/f2a85-m/bootblock.c
+++ b/src/mainboard/asus/f2a85-m/bootblock.c
@@ -32,9 +32,7 @@ static void sbxxx_enable_48mhzout(void)
reg32 |= 0x00100000;
misc_write32(0x28, reg32);
- reg32 = misc_read32(0x40);
- reg32 &= ~0x80u;
- misc_write32(0x40, reg32);
+ misc_write32(0x40, misc_read32(0x40) & (~0x80u));
}
static void superio_init_m(void)
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 3aa29c8ce3..5b7494d9ee 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/smbus.h>
@@ -26,10 +27,7 @@ void board_BeforeAgesa(struct sysinfo *cb)
post_code(0x30);
/* turn on secondary smbus at b20 */
- outb(0x28, 0xcd6);
- byte = inb(0xcd7);
- byte |= 1;
- outb(byte, 0xcd7);
+ pm_write8(0x28, pm_read8(0x28) | 1);
/* set DDR3 voltage */
byte = CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL;