diff options
| author | Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> | 2015-07-26 19:57:51 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-07 01:13:59 +0100 |
| commit | 420d3a93c1f54768591dab1958c037e2c8936d58 (patch) | |
| tree | 8e8e853922a54b6f54917ac017adaad9c0261546 /src/mainboard/asus/f2a85-m/romstage.c | |
| parent | d610c5823c85f0cf39daae7836df83ece4716993 (diff) | |
mainboard/asus: Add F2A85-M PRO variant to F2A85-M.
Status:
- The primary PCIe 16x slot works:
It was tested with a GPU compatible with nouveau
- USB and audio are not very reliable
- The ethernet card is not seen with lspci
- The secondary pcie16x slot isn't working:
When plugging a GPU inside, it's not seen with lspci
- SATA works: The board fully boots GNU/Linux
- Serial doesn't work
- Populating the RAM slots might have to follow
the recommended memory configuration that is described
in the mainboard manual in order to be able to boot.
Note that when running the shutdown command, the default
boot firmware will rewrite part of the boot flash before
powering off the machine.
Flashing coreboot internally from the default boot fimrware can
still work, if the power plug is removed after running flashrom.
Change-Id: I934de521d0acceb7770f23b2ae15c31a67ae73eb
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/16931
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/f2a85-m/romstage.c')
| -rw-r--r-- | src/mainboard/asus/f2a85-m/romstage.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 90d3fbae32..d66c7d52bd 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -35,15 +35,25 @@ #include <southbridge/amd/agesa/hudson/smbus.h> #include <stdint.h> #include <string.h> +#if CONFIG_BOARD_ASUS_F2A85_M #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h> +#elif CONFIG_BOARD_ASUS_F2A85_M_PRO +#include <superio/nuvoton/common/nuvoton.h> +#include <superio/nuvoton/nct6779d/nct6779d.h> +#endif /* CONFIG_BOARD_ASUS_F2A85_M */ + #define MMIO_NON_POSTED_START 0xfed00000 #define MMIO_NON_POSTED_END 0xfedfffff #define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) +#if CONFIG_BOARD_ASUS_F2A85_M #define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO) +#elif CONFIG_BOARD_ASUS_F2A85_M_PRO +#define SERIAL_DEV PNP_DEV(0x2e, NCT6779D_SP1) +#endif /* CONFIG_BOARD_ASUS_F2A85_M */ static void sbxxx_enable_48mhzout(void) { @@ -96,9 +106,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* enable SIO clock */ sbxxx_enable_48mhzout(); +#if CONFIG_BOARD_ASUS_F2A85_M ite_kill_watchdog(GPIO_DEV); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); ite_enable_3vsbsw(GPIO_DEV); +#elif CONFIG_BOARD_ASUS_F2A85_M_PRO + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +#endif console_init(); /* turn on secondary smbus at b20 */ |